5962-8780201RA Analog Devices Inc, 5962-8780201RA Datasheet - Page 5

• Manufacturer Part Number: 5962-8780201RA
• Manufacturer: Analog Devices Inc

Specifications of 5962-8780201RA

• Number Of Channels: 4
• Resolution: 8b
• Conversion Rate: 143KSPS
• Interface Type: Parallel
• Single Supply Voltage (typ): 15V
• Dual Supply Voltage (typ): -5/12/-5/15V
• Settling Time: 20us
• Architecture: R-2R
• Power Supply Requirement: Single/Dual
• Output Type: Voltage
• Integral Nonlinearity Error: ±1LSB
• Single Supply Voltage (min): 14.25V
• Single Supply Voltage (max): 15.75V
• Dual Supply Voltage (min): -4.5/11.4V
• Dual Supply Voltage (max): -5.5/16.5V
• Operating Temp Range: -55C to 125C
• Operating Temperature Classification: Military
• Mounting: Through Hole
• Pin Count: 20
• Package Type: CDIP
• Lead Free Status / Rohs Status: Not Compliant

REV. A
CIRCUIT INFORMATION
D/A SECTION
The AD7226 contains four, identical, 8-bit, voltage mode
digital-to-analog converters. The output voltages from the con-
verters have the same polarity as the reference voltage allowing
single supply operation. A novel DAC switch pair arrangement
on the AD7226 allows a reference voltage range from +2 V to
+12.5 V.
Each DAC consists of a highly stable, thin-film, R-2R ladder
and eight high speed NMOS, single-pole, double-throw
switches. The simplified circuit diagram for one channel is
shown in Figure 1. Note that V
are common to all four DACs.
The input impedance at the V
allel combination of the four individual DAC reference input
impedances. It is code dependent and can vary from 2 k to in-
finity. The lowest input impedance (i.e., 2 k ) occurs when all
four DACs are loaded with the digital code 01010101. There-
fore, it is important that the reference presents a low output im-
pedance under changing load conditions. The nodal capacitance
at the reference terminals is also code dependent and typically
varies from 100 pF to 250 pF.
Each V
voltage source with an output voltage of:
The source impedance is the output resistance of the buffer
amplifier.
OP AMP SECTION
Each voltage-mode D/A converter output is buffered by a unity
gain, noninverting CMOS amplifier. This buffer amplifier is
capable of developing +10 V across a 2 k load and can drive
capacitive loads of 3300 pF. The output stage of this amplifier
consists of a bipolar transistor from the V
load to the V
This output stage is shown in Figure 2.
The NPN transistor supplies the required output current drive
(up to 5 mA). The current load consists of NMOS transistors
which normally act as a constant current sink of 400 A to V
giving each output a current sink capability of approximately
400 A if required.
The AD7226 can be operated single or dual supply resulting
in different performance in some parameters from the output
amplifiers.
In single supply operation (V
put approaching AGND (i.e., digital code approaching all 0s)
V
where D
and can vary from 0 to 255/256.
OUTX
OUT
= D
Figure 1. D/A Simplified Circuit Diagram
X
pin can be considered as a digitally programmable
is fractional representation of the digital input code
SS
X
, the negative supply for the output amplifiers.
V
REF
SS
REF
REF
= 0 V = AGND), with the out-
pin of the AD7226 is the par-
(Pin 4) and AGND (Pin 5)
DD
line and a current
SS
,
–5–
the current load ceases to act as a current sink and begins to act
as a resistive load of approximately 2 k to AGND. This occurs
as the NMOS transistors come out of saturation. This means
that, in single supply operation, the sink capability of the ampli-
fiers is reduced when the output voltage is at or near AGND. A
typical plot of the variation of current sink capability with out-
put voltage is shown in Figure 3.
If the full sink capability is required with output voltages at or
near AGND (=0 V), then V
and thereby maintain the 400 A current sink as indicated in
Figure 3. Biasing V
in the output amplifier which allows for better zero code error
performance on each output. Also improved is the slew-rate
and negative-going settling-time of the amplifiers (discussed
later).
Each amplifier offset is laser trimmed during manufacture to
eliminate any requirement for offset nulling.
DIGITAL SECTION
The digital inputs of the AD7226 are both TTL and CMOS
(5 V) compatible from V
puts are static protected MOS gates with typical input currents
of less than 1 nA. Internal input protection is achieved by an
on-chip distributed diode from DGND to each MOS gate. To
minimize power supply currents, it is recommended that the
digital input voltages be driven as close to the supply rails (V
and DGND) as practically possible.
Figure 3. Variation of I
Figure 2. Amplifier Output Stage
SS
below 0 V also gives additional headroom
DD
SS
= +11.4 V to +16.5 V. All logic in-
can be brought below 0 V by 5 V
SINK
with V
AD7226
OUT
DD