AT45DB161D-SU-2.5 SL383 Atmel, AT45DB161D-SU-2.5 SL383 Datasheet - Page 34

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AT45DB161D-SU-2.5 SL383

Manufacturer Part Number
AT45DB161D-SU-2.5 SL383
Description
Manufacturer
Atmel
Datasheet

Specifications of AT45DB161D-SU-2.5 SL383

Density
16Mb
Access Time (max)
6ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC EIAJ
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Supply Current
15mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant
21.6
34
Figure 21-1. Atmel RapidS Mode
Reset Timing
Note:
SO (OUTPUT)
Atmel AT45DB161D
MOSI = Master Out, Slave In
MISO = Master In, Slave Out
The Master is the host controller and the Slave is the Atmel DataFlash
The Master always clocks data out on the rising edge of SCK and always clocks data in on the falling edge of SCK.
The Slave always clocks data out on the falling edge of SCK and always clocks data in on the rising edge of SCK.
Slave
A.
B.
C.
D.
E.
F.
G. Master clocks in first bit of BYTE-SO
H. Slave clocks out second bit of BYTE-SO
I.
SI (INPUT)
MOSI
MISO
SCK
Master clocks out first bit of BYTE-MOSI on the rising edge of SCK
Slave clocks in first bit of BYTE-MOSI on the next rising edge of SCK
Master clocks out second bit of BYTE-MOSI on the same rising edge of SCK
Last bit of BYTE-MOSI is clocked out from the Master
Last bit of BYTE-MOSI is clocked into the slave
Slave clocks out first bit of BYTE-SO
Master clocks in last bit of BYTE-SO
RESET
CS
The CS signal should be in the high state before the RESET signal is deasserted
SCK
CS
A
1
B
MSB
HIGH IMPEDANCE
C
2
3
4
BYTE-MOSI
5
6
7
D
8
E
LSB
F
1
G
MSB
2
H
3
t RST
t REC
4
HIGH IMPEDANCE
BYTE-SO
5
6
t CSS
7
3500N–DFLASH–05/10
8
I
LSB
1

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