A3PN060-VQG100 Actel, A3PN060-VQG100 Datasheet - Page 52

• Manufacturer Part Number: A3PN060-VQG100
• Manufacturer: Actel

ProASIC3 nano DC and Switching Characteristics
Figure 2-14 • Output Enable Register Timing Diagram
Table 2-56 • Output Enable Register Propagation Delays
2 -3 8
Enable
Preset
EOUT
CLK
D_Enable
Clear
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
OECLKQ
OESUD
OEHD
OECLR2Q
OEPRE2Q
OEREMCLR
OERECCLR
OEREMPRE
OERECPRE
OEWCLR
OEWPRE
OECKMPWH
OECKMPWL
For specific junction temperature and voltage supply levels, refer to
values.
Clock-to-Q of the Output Enable Register
Data Setup Time for the Output Enable Register
Data Hold Time for the Output Enable Register
Asynchronous Clear-to-Q of the Output Enable Register
Asynchronous Preset-to-Q of the Output Enable Register
Asynchronous Clear Removal Time for the Output Enable Register
Asynchronous Clear Recovery Time for the Output Enable Register
Asynchronous Preset Removal Time for the Output Enable Register
Asynchronous Preset Recovery Time for the Output Enable Register
Asynchronous Clear Minimum Pulse Width for the Output Enable Register 0.22 0.25 0.30
Asynchronous Preset Minimum Pulse Width for the Output Enable Register 0.22 0.25 0.30
Clock Minimum Pulse Width HIGH for the Output Enable Register
Clock Minimum Pulse Width LOW for the Output Enable Register
Output Enable Register
Timing Characteristics
Commercial-Case Conditions: T
50%
50%
t
OESUE
1
t
OEHE
50%
t
OESUD
50%
t
0
OECLKQ
t
50%
OEHD
50%
50%
t
Description
OEWPRE
J
= 70°C, Worst-Case V
t
OEPRE2Q
A d v a n c e v 0. 2
50%
50%
t
50%
OERECPRE
50%
t
t
OEWCLR
OECLR2Q
50%
50%
CC
= 1.425 V
t
50%
OERECCLR
Table 2-6 on page 2-5
50%
t
OECKMPWH
t
OEREMPRE
0.44 0.51 0.59
0.31 0.36 0.42
0.67 0.76 0.89
0.67 0.76 0.89
0.00 0.00 0.00
0.22 0.25 0.30
0.00 0.00 0.00
0.22 0.25 0.30
0.36 0.41 0.48
0.32 0.37 0.43
0.00 0.00 0.00
50%
–2
50%
t
OECKMPWL
–1
for derating
Std. Units
t
OEREMCLR
50%
50%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns