DS32EL0421SQ National Semiconductor, DS32EL0421SQ Datasheet - Page 14
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DS32EL0421SQ
Manufacturer Part Number
DS32EL0421SQ
Description
Manufacturer
National Semiconductor
Datasheet
1.DS32EL0421SQ.pdf
(28 pages)
Specifications of DS32EL0421SQ
Lead Free Status / Rohs Status
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Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS32EL0421SQE/NOPB
Manufacturer:
NSC
Quantity:
2 500
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alizer to communicate. This feature is used to pass link status
information between the 2 devices. When Remote Sense is
enabled the serializer will send a training pattern to the de-
serializer to establish lock and lane alignment.
If DC-Balance is enabled, a maximum of 4 parallel LVDS
lanes can be used to receive data. The fifth lane (TXIN4±) is
used for Data Valid signaling. Each time a serializer estab-
lishes a link to a deserializer with DC-Balance enabled and
Remote Sense disabled, the Data Valid input to the serializer
must be held high for 110 LVDS clock periods. If the Data
Valid input to the serializer is logic HIGH, then SYNC char-
acters are transmitted. If the deserializer receives a SYNC
character, then the LVDS data outputs will all be logic low and
the Data Valid output will be logic high. If the deserializer de-
tects a DC-Balance code error, the output data pins will be
set to logic high with the Data Valid output also set to logic
high.
In the case where DC-Balance is enabled and Remote Sense
is disabled, with RS set to high and DC_B set to low, it is
recommended that the host device periodically toggle the Da-
TABLE 1. Device Configuration Table
Remote Sense Pin (RS)
0
0
1
1
DC-Balance Pin (DC_B)
0
1
0
1
14
Configuration
Remote Sense enabled
DC-Balance enabled
Data Alignment
Scrambler and NRZI encoder disabled by default
Remote Sense enabled
DC-Balance disabled
Data Alignment
Scrambler and NRZI encoder enabled by default
Remote Sense disabled
DC-Balance enabled
Data Alignment
Scrambler and NRZI encoder enabled by default
Remote Sense disabled
DC-Balance disabled
No Data Alignment
Scrambler and NRZI encoder disabled by default
ta Valid input to the serializer, to transmit SYNC symbols on
the line, to ensure that the deserializer is and remains locked.
In this configuration the deserializer or receiving device does
not have a way to directly notify the serializer if it has lost lock.
Periodically sending SYNC symbols will allow the receiving
system to reacquire lock if a problem has occurred. With these
pin
DS32EL0124/DS32ELX0124 devices can interface with other
active component in the high speed signal path, such as fiber
modules.
When both Remote Sense and DC-Balance are disabled,
RS and DC_B pins set to high, the LVDS lane alignment is
not maintained. In this configuration, data formatting is han-
dled by an FPGA or external source. This pin setting combi-
nation also allows for the DS32EL0421/DS32ELX0421 de-
vices to interface with active components other than the
DS32EL0124/DS32ELX0124 in the high speed signal path.
In this configuration the host device is responsible for DC bal-
ancing the data in an AC coupled application.
settings
the
DS32EL0421/DS32ELX0421
and