M25P128-VME6GB Micron Technology Inc, M25P128-VME6GB Datasheet - Page 20
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M25P128-VME6GB
Manufacturer Part Number
M25P128-VME6GB
Description
Manufacturer
Micron Technology Inc
Datasheet
1.M25P128-VME6GB.pdf
(47 pages)
Specifications of M25P128-VME6GB
Cell Type
NOR
Density
128Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
VDFPN EP
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
16M
Supply Current
8mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25P128-VME6GB
Manufacturer:
NUMONYX
Quantity:
1 920
Company:
Part Number:
M25P128-VME6GB
Manufacturer:
SILICON
Quantity:
2 310
Part Number:
M25P128-VME6GB
Manufacturer:
ST
Quantity:
20 000
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6.2
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Write enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
Write disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Figure 9.
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Write enable (WREN) instruction sequence
Write disable (WRDI) instruction sequence
S
C
D
Q
S
C
D
Q
(Figure
High Impedance
(Figure
High Impedance
0
0
1
1
2
2
Instruction
Instruction
9) resets the Write Enable Latch (WEL) bit.
8) sets the Write Enable Latch (WEL) bit.
3
3
4
4
5
5
6
6
7
7
AI02281E
AI03750D