HBLXT9785HC.C2 Cortina Systems Inc, HBLXT9785HC.C2 Datasheet - Page 164

• Manufacturer Part Number: HBLXT9785HC.C2
• Manufacturer: Cortina Systems Inc

Specifications of HBLXT9785HC.C2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
5.2.6
Figure 33
Cortina Systems
Refer to the fiber transceiver manufacturer’s recommendations for termination circuitry.
Figure 36
interface.
The following occurs in 5 V fiber transceiver applications as shown in
Refer to the fiber transceiver manufacturer’s recommendations for termination circuitry.
Figure 37
interface, while
LED Circuit
Each Direct Drive LED has a corresponding open-drain pin. The LEDs are connected
through a current-limiting resistor to a positive-voltage rail. The LEDs are turned on when
the output pin drives Low. The open-drain LED pins are 5 V tolerant, allowing use of either
a 3.3 V or 5 V rail (a 2.5 V rail is unlikely to work with standard forward voltage LEDs). A 5
V rail eases LED component selection by allowing more common, high-forward voltage
LEDs to be used. Refer to
LED Circuit
®
• The receive pair should be DC-coupled with an emitter current path for the fiber
• The signal detect pin should be DC-coupled with an emitter current path for the fiber
• The transmit pair should be AC-coupled and re-biased to 5 V PECL input levels
• The transmit pair should contain a balance offset in the pull-up resistors to prevent
• The receive pair should be AC-coupled with an emitter current path for the fiber
• The signal detect pin on a 5 V fiber transceiver interface should use the logic
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
transceiver
transceiver
PHY-to-fiber transceiver crosstalk amplification in power-down, loopback, and reset
states (see fiber interface application note)
transceiver and re-biased to 1.2 V
translator circuitry as shown in
shows a typical example of an LXT9785/LXT9785E-to-3.3 V fiber transceiver
shows a typical example of an LXT9785/LXT9785E-to-5 V fiber transceiver
Figure 38
shows the interface circuitry for the logic translator.
Figure 33
VCCIO < V
Figure
for a circuit illustration.
Inside
IC
38.
LED
LED n _m
Outside
R
IC
V
< 5 V + 5%
LED
5.2 General Design Guidelines
Figure
37:
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