ISL97671AIRZ-T Intersil, ISL97671AIRZ-T Datasheet

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... FIGURE 1B. PWM DIMMING WITH ADJUSTABLE DIMMING CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 Intersil (and design trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. 45V 50mA VIN = 4.5~26.5V ...

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Block Diagram V = 4.5V TO 26. VDC REG OSC AND RAMP COMP FPWM LED PWM CONTROL COMP GM AMP + + - - RSET AGND PWM BRIGHTNESS CONTROL 2 SMBUS/I C SMBCLK/SCL INTERFACE SMBDAT/SDA AND ...

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... PART NUMBER PART (Notes MARKING ISL97671AIRZ 671A 20 Ld 3x4 QFN ISL97671AIRZ-EVALZ Evaluation Board NOTES: 1. Add “-T* suffix for tape and reel. Please refer to reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and ...

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Table of Contents Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 1 Block Diagram ...

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... A Thermal Resistance (Typical QFN Package (Notes Thermal Characterization (Typical QFN Package (Note Maximum Continuous Junction Temperature . . . . . . . . . . . . . . . . .+125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85° and θ thermal resistance ratings. ...

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Electrical Specifications temperature range, -40°C to +85°C. (Continued) PARAMETER DESCRIPTION r Internal Boost Switch ON-resistance DS(ON) SS Soft-Start Eff_peak Peak Efficiency ΔI /ΔV Line Regulation OUT IN D Boost Maximum Duty Cycle MAX D Boost Minimum Duty Cycle MIN f ...

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Electrical Specifications temperature range, -40°C to +85°C. (Continued) PARAMETER DESCRIPTION LXstart_thres LX Start-up Threshold ILXStart-up LX Start-up Current 2 SMBus/I C INTERFACE V Guaranteed Range for Data, Clock Input Low IL Voltage V Guaranteed Range for Data, Clock Input High ...

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Typical Performance Curves 100 24V 60 IN 12V LED(mA) FIGURE 3. EFFICIENCY 20mA LED CURRENT (100% LED DUTY CYCLE 100 ...

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Typical Performance Curves 1.2 1.0 0.8 0 0.4 0 FIGURE 9. CURRENT LINEARITY vs LOW LEVEL PWM DIMMING DUTY CYCLE 50mV/DIV O 2.00µs/DIV FIGURE 11. V RIPPLE ...

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Typical Performance Curves 6P12S, 20mA/ 10V/DIV IN 10.0ms/DIV I_V IN EN FIGURE 15. LINE REGULATION WITH V IN FOR 6P12S AT 20mA/CHANNEL 6P12S, 20mA/ 1V/DIV O 10.0ms/DIV ILED = 20mA/DIV FIGURE 17. LOAD REGULATION WITH I ...

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Theory of Operation PWM Boost Converter The current mode PWM boost converter produces the minimal voltage needed to enable the LED stack with the highest forward voltage drop to run at the programmed current. The ISL97671A employs current mode control ...

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The ISL97671A allows two ways of controlling the LED current, and therefore, the brightness. They are current adjustment 2. PWM chopping of the LED current defined in Step 1. There are various ways to achieve DC or PWM ...

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Direct PWM Dimming When Direct PWM Dimming mode is selected where and SMBCLK/SMBDAT are grounded, 6 channels of PWM DC current will follow the incoming PWM signal’s frequency and duty cycle. The change is analog fashion without ...

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Low Dropout Regulator A 5V LDO regulator is present at the VDC pin to develop the necessary low voltage supply, which is used by the chips internal control circuitry. Because VDC is an LDO pin, it requires a bypass ...

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This is due to the increased forward voltage of the faulty channel making all other channel look as if they have LED shorts. See Table 2 for details for responses to ...

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V IN FAULT DRIVER IMAX ILIMIT VSET/2 REG FAULT/ STATUS REGISTER CASE FAILURE MODE DETECTION MODE 1 CH0 Short Circuit Upper Over-Temperature Protection limit (OTP) not triggered and CH0 < 7.5V 2 CH0 Short Circuit Upper OTP triggered but VCH0 ...

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CASE FAILURE MODE DETECTION MODE 9 Channel-to-Channel Upper OTP triggered but ΔVF too high CHx < 7.5V 10 Output LED stack V > VOVP OUT voltage too high 11 V /LX shorted to LX current and timing are OUT GND ...

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S Slave Address W A Master to Slave Slave to Master 2 SMBus/I C Communications The ISL97671A can be controlled by SMBus/I dimming. The LEDs driving is default to off and the users will need 2 ...

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... OV_CURR = Input overcurrent (1 = Overcurrent condition Current OK) THRM_SHDN = Thermal Shutdown (1 = Thermal fault Thermal OK) FAULT = Fault occurred (Logic “OR” of all of the fault conditions) MFG[3..0] = Manufacturer ID (16 vendors available. Intersil is vendor ID 9) REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for silicon spins) BRTDC[7..0] = 256 steps of DC brightness control DirectPWM = Forces the PWM input signal to directly control the current sources ...

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REGISTER 0x00 PWM BRIGHTNESS CONTROL REGISTER BRT7 BRT6 BRT5 Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) BIT ASSIGNMENT = 256 steps of PWM brightness levels BRT[7..0] FIGURE 30. DESCRIPTIONS OF BRIGHTNESS CONTROL REGISTER REGISTER 0x01 DEVICE CONTROL REGISTER ...

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... Bit 5 (R) BIT ASSIGNMENT = Manufacturer ID. See “Identification Register MFG[3..0] (0x03)” on page 21. data decimal correspond to other vendors data 9 in decimal represents Intersil ID data decimal are reserved data 15 in decimal Manufacturer ID is not implemented REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for silicon ...

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REGISTER 0x07 DC BRIGHTNESS CONTROL REGISTER BRTDC7 BRTDC6 BRTDC5 Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) BIT ASSIGNMENT = 256 steps of DC brightness levels BRTDC[7..0] FIGURE 34. DESCRIPTIONS OF DC BRIGHTNESS CONTROL REGISTER DC Brightness Control Register ...

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Output Channel Mask/Fault Readout Register (0x09) This register can be read or write; the bit position corresponds to the channel. For example, Bit 0 corresponds to Ch0 and bit 5corresponds to Ch5 and so on. Writing data to this register, ...

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REGISTER 0x0A PHASE SHIFT CONTROL REGISTER EQUALPHASE PHASESHIFT6 PHASESHIFT5 Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) BIT ASSIGNMENT EqualPhase Controls phase shift mode - When 0, phase shift is defined by PhaseShift<6:0>. When 1, phase shift PhaseShift[6..0] 7-bit ...

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Inductor The selection of the inductor should be based on its maximum current (I ) characteristics, power dissipation (DCR), EMI SAT susceptibility (shielded vs unshielded), and size. Inductor type and value influence many key parameters, including ripple current, current limit, ...

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SMBCLK SMBDAT EN SMBCLK SMBDAT EN FIGURE 39. MULTIPLE DRIVERS OPERATION Low Voltage Operations The ISL97671A VIN pin can be seperately biased from the LEDs power input to allow low voltage operation. For systems that have only single supply, V ...

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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. ...

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Package Outline Drawing L20.3x4 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 3/10 3. PIN 1 INDEX AREA A TOP VIEW (2.65) (3.80) (1.65) (2.80) TYPICAL RECOMMENDED LAND PATTERN 28 ISL97671A A B 20X 4 4.00 0.15 ...