ISL54053IRUZ-T Intersil, ISL54053IRUZ-T Datasheet

IC SWITCH SPDT 6UTDFN

ISL54053IRUZ-T

Manufacturer Part Number
ISL54053IRUZ-T
Description
IC SWITCH SPDT 6UTDFN
Manufacturer
Intersil
Datasheet

Specifications of ISL54053IRUZ-T

Function
Switch
Circuit
1 x SPDT
On-state Resistance
860 mOhm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V
Current - Supply
0.075µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
6-µTDFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ultra Low ON-Resistance, Low Voltage, Single
Supply, SPDT Analog Switch
ISL54053
The Intersil ISL54053 device is a low ON-resistance, low
voltage, bidirectional, single pole/double throw (SPDT)
analog switch designed to operate from a single +1.8V
to +5.5V supply. Targeted applications include battery
powered equipment which benefit from low r
and fast switching speeds (t
The digital logic input is 1.8V logic compatible when
using a single +3.0V supply.
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins
may be limited and digital geometries are not well
suited to analog switch performance. This part may be
used to “mux-in” additional functionality while reducing
ASIC design risk. The ISL54053 is offered in the 6 Ld
1.2mmx1.0mmx0.5mm µTDFN and 6 Ld SOT-23
packages, alleviating board space limitations.
The ISL54053 is a committed SPDT that consists of one
normally open (NO) and one normally closed (NC)
switch. This configuration can also be used as a 2-to-1
multiplexer.
October 19, 2009
FN6460.3
Number of Switches
1.8V t
3V t
5V t
Packages
1.8V r
3V r
5V r
TABLE 1. FEATURES AT A GLANCE
ON
ON
SW
ON
/t
/t
ON
ON
ON
/t
OFF
OFF
OFF
1
ON
6 Ld μTDFN, 6 Ld SOT-23
= 24ns, t
SPDT or 2-1 MUX
ISL54053
68ns/45ns
29ns/12ns
24ns/10ns
1-888-INTERSIL or 1-888-468-3774
2.3Ω
1.1Ω
0.8Ω
OFF
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
ON
= 10ns).
(0.8Ω)
Features
• Drop In replacement for the NLAS5123
• ON-resistance (r
• r
• r
• Single supply operation . . . . . . . . +1.8V to +5.5V
• Fast switching action (+4.5V supply)
• Guaranteed break-before-make
• ESD HBM rating . . . . . . . . . . . . . . . . . . . . . . >6kV
• 1.8V CMOS logic compatible (+3V supply)
• Available in 6 Ld µTDFN and 6Ld SOT-23 Packages
• Pb-free (RoHS compliant)
Applications
• Battery powered, handheld, and portable equipment
• Portable test and measurement
• Medical equipment
• Audio and video switching
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
- V
- V
- V
- t
- t
- Cellular/mobile phones
- Pagers
- Laptops, notebooks, palmtops
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
All other trademarks mentioned are the property of their respective owners.
ON
ON
|
ON
OFF
CC
CC
CC
Intersil (and design) is a registered trademark of Intersil Americas Inc.
matching between channels . . . . . . . . . 0.004Ω
flatness (+4.5V supply) . . . . . . . . . . . . 0.25Ω
Copyright © Intersil Americas Inc. 2007, 2009. All Rights Reserved
= +5.0V. . . . . . . . . . . . . . . . . . . . . 0.8Ω
= +3.0V. . . . . . . . . . . . . . . . . . . . . 1.1Ω
= +1.8V. . . . . . . . . . . . . . . . . . . . . 2.3Ω
. . . . . . . . . . . . . . . . . . . . . . . . . . . 24ns
. . . . . . . . . . . . . . . . . . . . . . . . . . . 10ns
ON
)

Related parts for ISL54053IRUZ-T

ISL54053IRUZ-T Summary of contents

Page 1

... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2007, 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ...

Page 2

... Ordering Information PART NUMBER PART (Notes 1, 4) MARKING ISL54053IRUZ-T(Note 2) C ISL54053IHZ-T (Note 3) 4053 NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 3

... Ld SOT-23 (Notes Maximum Junction Temperature (Plastic Package). . Maximum Storage Temperature Range -65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions V+ (Positive DC Supply Voltage 1.8V to 5.5V Analog Signal Range . . . . . . . . . . . . . . . . . . . . . . (Digital Logic Input Voltage (IN) ...

Page 4

Electrical Specifications - 5V Supply PARAMETER Total Harmonic Distortion f = 20Hz to 20kHz 600Ω L -3dB Bandwidth R = 50Ω OFF Capacitance 4.5V 1MHz (See Figure ...

Page 5

Electrical Specifications - 3V Supply PARAMETER COM ON Capacitance 1MHz (See Figure 7) COM(ON) DIGITAL INPUT CHARACTERISTICS Input Voltage Low, V INL Input Voltage High, V INH Input Current 3.6V, V ...

Page 6

Test Circuits and Waveforms V INH LOGIC 50% INPUT V INL t OFF SWITCH V Nx INPUT V 90% SWITCH OUTPUT Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT ...

Page 7

Test Circuits and Waveforms SIGNAL GENERATOR COM ANALYZER GND R L FIGURE 4. OFF ISOLATION TEST CIRCUIT 50Ω ANALYZER GND R L FIGURE 6. CROSSTALK TEST ...

Page 8

OPTIONAL SCHOTTKY DIODE V+ OPTIONAL PROTECTION RESISTOR GND OPTIONAL SCHOTTKY DIODE FIGURE 8. OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL54053 construction is typical of most single supply CMOS analog switches, in that they have two supply pins: ...

Page 9

Typical Performance Curves 2.5 2 1.8V 1 2. (V) COM FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE 1.5 1.4 1.3 1.2 ...

Page 10

Typical Performance Curves 1.6 1.4 1.2 V INH 1.0 0.8 0.6 0.4 0.2 2.0 2.5 3.0 3.5 4.0 V+ (V) FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE 1.8V to 5.5V -20 -40 ISOLATION CROSSTALK -60 -80 ...

Page 11

... The pin #1 identifier may be either a mold or mark feature. 7. Maximum package warpage is 0.05mm. 8. Maximum allowable burrs is 0.076mm in all directions. 9. JEDEC Reference MO-255. 10. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389. 0.35 10 MILLIMETERS MIN NOMINAL MAX 0 ...

Page 12

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...

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