MT46H4M32LFB5-5:K TR Micron Technology Inc, MT46H4M32LFB5-5:K TR Datasheet - Page 45

MT46H4M32LFB5-5:K TR

Manufacturer Part Number
MT46H4M32LFB5-5:K TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46H4M32LFB5-5:K TR

Organization
4Mx32
Density
128Mb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
110mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
State Diagram
Figure 14: Simplified State Diagram
PDF: 09005aef8331b3e9
128mb_mobile_ddr_sdram_t35m.pdf - Rev. F 03/10 EN
ACT = ACTIVE
AREF = AUTO REFRESH
BST = BURST TERMINATE
CKEH = Exit power-down
CKEL = Enter power-down
DPD = Enter deep power-down
applied
Power
WRITE
LMR
PRE
PREALL
Power
PRE
EMR
LMR
WRITE A
on
WRITING
WRITING
power-
Active
down
DPDX = Exit deep power-down
EMR = LOAD EXTENDED MODE REGISTER
LMR = LOAD MODE REGISTER
PRE = PRECHARGE
PREALL = PRECHARGE all banks
READ = READ w/o auto precharge
DPDX
WRITE
LMR
CKEL
power-
down
Deep
WRITE A
WRITE A
CKEH
PRE
DPD
Precharging
precharged
all banks
active
45
Row
Idle:
ACT
PRE
SREF
READ A
WRITE
READ
128Mb: x16, x32 Mobile LPDDR SDRAM
CKEH
refresh
READ A
PRE
Self
SREFX
Micron Technology, Inc. reserves the right to change products or specifications without notice.
SRR
CKEL
READ
Precharge
AREF
power-
down
terminate
READING
READING
BST
Burst
SRR
READ A
READ A = READ w/ auto precharge
SREF = Enter self refresh
SREFX = Exit self refresh
SRR = STATUS REGISTER READ
WRITE = WRITE w/o auto precharge
WRITE A = WRITE w/ auto precharge
refresh
Automatic sequence
Command sequence
Auto
READ
READ
© 2007 Micron Technology, Inc. All rights reserved.
READ
State Diagram

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