LFE2M20SE-6FN256C Lattice, LFE2M20SE-6FN256C Datasheet - Page 172

• Manufacturer Part Number: LFE2M20SE-6FN256C
• Description: IC FPGA 20KLUTS 140I/O 256-BGA
• Manufacturer: Lattice

Specifications of LFE2M20SE-6FN256C

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
LFE2-35E/SE and LFE2-50E/SE Logic Signal Connections: 484 fpBGA
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
***Due to packaging bond out option, this DQS does not have all the necessary DQ pins bonded out for a full 8-bit data width.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one
connection with a package ball or pin.
Number
W21
Ball
N10
N11
N12
N13
N15
P14
P20
R10
R11
R12
R13
U17
Y14
N18
J16
W2
N8
U6
N6
P3
P9
Y9
A1
K6
Function
Ball/Pad
VCCPLL
VCCPLL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
Bank
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LFE2-35E/SE
Dual Function
Differential
4-72
Function
Ball/Pad
VCCPLL
VCCPLL
VCCPLL
VCCPLL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
LatticeECP2/M Family Data Sheet
Bank
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LFE2-50E/SE
Dual Function
Pinout Information
Differential