LFXP3E-3QN208I Lattice, LFXP3E-3QN208I Datasheet - Page 197
LFXP3E-3QN208I
Manufacturer Part Number
LFXP3E-3QN208I
Description
IC FPGA 3.1KLUTS 136I/O 208-PQFP
Manufacturer
Lattice
Datasheet
1.LFXP3C-3T100C.pdf
(397 pages)
Specifications of LFXP3E-3QN208I
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Part Number:
LFXP3E-3QN208I
Manufacturer:
Lattice Semiconductor Corporation
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Figure 9-34. FIFO Without Output Registers, End of Data Write Cycle
In this case, as seen above, the Almost Full flag is IN location 2 before the FIFO is filled. The Almost Full flag is
asserted when N-2 location is written, and Full flag is asserted when the last word is written into the FIFO.
Data_X data inputs do not get written as the FIFO is full (Full flag is high).
Now let us look at the waveforms when the contents of the FIFO are read out. Figure 9-35 shows the start of the
read cycle. RdEn goes high and the data read starts. The Full and Almost Full flags gets de-asserted as shown.
Almost Full
Almost
Reset
Empty
Empty
Clock
WrEn
RdEn
Data
Full
Q
Data_N-2
Data_N-1
9-32
Invalid Q
Data_N
LatticeECP/EC and LatticeXP Devices
Data_X
Data_X
Memory Usage Guide
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