LFXP3E-4TN100C Lattice, LFXP3E-4TN100C Datasheet - Page 338
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFXP3E-4TN100C
Manufacturer Part Number
LFXP3E-4TN100C
Description
IC FPGA 3.1KLUTS 62I/O 100-TQFP
Manufacturer
Lattice
Datasheet
1.LFXP3C-3T100C.pdf
(397 pages)
Specifications of LFXP3E-4TN100C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP3E-4TN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Company:
Part Number:
LFXP3E-4TN100C-3I
Manufacturer:
lattice
Quantity:
2
- Current page: 338 of 397
- Download datasheet (10Mb)
Lattice Semiconductor
The following are the HDL representations of the design in Figure 13-7.
The preferable way is to fully employ the PFU's natural “Ripple-mode”. A single PFU can support up to 8-bit ripple
functions with fast carry logic. Figure 13-8 is an example of 4-bit counter in PFU “Ripple Mode”. In Lattice Semicon-
ductor FPGA architectures, an internal generated clock can get on the clock spine for small skew clock distribution,
further enhancing the performance of the clock divider.
Figure 13-8. Use PFU “Ripple Mode”
Here are the HDL representations of the design in Figure 13-8.
-- VHDL Example of Daisy Chaining FF
...
-- 1st FF to divide Clock in half
CLK_DIV1: process(CLK, RST)
begin
end process CLK_DIV1;
-- 2nd FF to divide clock in half
CLK_DIV2: process(clk1, RST)
begin
end process CLK_DIV2;
-- VHDL : “RippleMode” Clock Divider
...
COUNT4: process(CLK, RST)
begin
end process COUNT4;
DIVBY4
DIVBY16 <= cnt(3);
if (RST='1') then
elsif (CLK'event and CLK='1') then
end if;
if (RST='1') then
elsif (clk1'event and clk1='1') then
end if;
if (RST='1') then
elsif (CLK'event and CLK='1') then
end if;
clk1 <= '0';
clk1 <= not clk1;
clk2 <= '0';
clk2 <= not clk2;
cnt <= (others=>'0');
cnt <= cnt + 1;
<= cnt(1);
Ripple Mode
Counter
LUT in
4-Bit
13-11
//Verilog : “RippleMode” Clock Divider
...
always @(posedge CLK or posedge RST)
begin
end
assign DIVBY4
assign DIVBY16 = cnt[3];
...
//Verilog Example of Daisy Chaining FF
...
always @(posedge CLK or posedge RST)
begin
end
always @(posedge clk1 or posedge RST)
begin
end
...
if (RST)
else
if (RST)
else
if (RST)
else
cnt = 4'b0;
cnt = cnt + 1'b1;
clk1 = 1'b0;
clk1 = !clk1;
clk2 = 1'b0;
clk2 = !clk2;
HDL Synthesis Coding Guidelines
for Lattice Semiconductor FPGAs
= cnt[1];
DIVBY2
DIVBY4
DIVBY8
DIVBY16
Related parts for LFXP3E-4TN100C
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFXP3E-4T100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.2V -4 Spd
Manufacturer:
Lattice
![LFXP3E-4T144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 IO 1.2 V -4 Spd
Manufacturer:
Lattice
![LFXP3E-4Q208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.2 V -4 Spd
Manufacturer:
Lattice
![LFXP3E-4Q208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.2 V -4 Spd I
Manufacturer:
Lattice
![LFXP3E-4T144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 IO 1.2 V -4 Spd I
Manufacturer:
Lattice
![LFXP3E-3TN100C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.2V 100-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3E-3TN144C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.2V 144-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3E-4TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 100I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
![LFXP3E-3QN208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 136I/O 208-PQFP
Manufacturer:
Lattice
Datasheet:
![LFXP3E-4T100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 62I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFXP3E-4TN100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 62I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFXP3E-5TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 62I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFXP3E-3TN100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 100TQFP
Manufacturer:
Lattice
Datasheet:
![LFXP3E-3QN208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 208PQFP
Manufacturer:
Lattice
Datasheet: