LFEC1E-3TN100I Lattice, LFEC1E-3TN100I Datasheet - Page 64
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LFEC1E-3TN100I
Manufacturer Part Number
LFEC1E-3TN100I
Description
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer
Lattice
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC1E-3TN100I
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC1E-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Figure 3-17. Configuration from PROGRAMN Timing
Figure 3-18. Wake-Up Timing
Figure 3-19. sysCONFIG SPI Port Sequence
PROGRAMN
SISPI/BUSY
D7/SPID0
CSSPIN
DONE
CCLK
INITN
VCC
PROGRAMN
t
DPPINIT
t
PROGRAMN
DINITD
USER I/O
CFG[2:0]
1. The CFG pins are normally static (hard wired)
t
PRGM
USER I/O
t
DONE
ICFG
CCLK
INITN
DONE
INITN
CCLK
t
DINIT
t
DPPINIT
t
DINITD
Capture
t
CFGx
CFGX
t
CSSPI
Wake-Up
t
CSCCLK
OPCODE
Capture
t
SOE
t
CSPID
t
t
IODISS
IOENSS
D7
0
t
SOCDO
t
PRGMRJ
1
D6
2
D5 D4 D3 D2 D1 D0
3-28
3
4
5
t
MWC
t
6
DINIT
7
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
t
SUCFG
Clock 127
XXX
0
Valid
Clock 128
Valid Bitstream
t
HCFG
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