LM3208TL/NOPBPB National Semiconductor, LM3208TL/NOPBPB Datasheet - Page 5

• Manufacturer Part Number: LM3208TL/NOPBPB
• Manufacturer: National Semiconductor

Specifications of LM3208TL/NOPBPB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Note 6: Junction-to-ambient thermal resistance (θ
) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC
JA
standard JESD51-7. A 4 layer, 4" x 4", 2/1/1/2 oz. Cu board as per JEDEC standards is used for the measurements.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Due
to the pulsed nature of the testing T
= T
for the electrical characteristics table.
A
J
Note 8: The parameters in the electrical characteristics table are tested under open loop conditions at PV
= V
= 3.6V unless otherwise specified. For
IN
DD
performance over the input voltage range and closed-loop results, refer to the datasheet curves.
Note 9: Shutdown current includes leakage current of PFET.
Note 10: I
specified here is when the part is not switching. For operating quiescent current at no load, refer to datasheet curves.
Q
Note 11: Current limit is built-in, fixed, and not adjustable. Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped
up until cycle by cycle limit is activated). Refer to System Characteristics table for maximum output current.
Note 12: Ripple voltage should be measured at C
electrode on a well-designed PC board and using the suggested inductor and capacitors.
OUT
Note 13: National Semiconductor recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper ESD handling
procedures can result in damage.
±
±
Note 14: Linearity limits are
3% or
50mV whichever is larger.
5
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