SDCFAA-008G SanDisk, SDCFAA-008G Datasheet - Page 15

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SDCFAA-008G

Manufacturer Part Number
SDCFAA-008G
Description
Manufacturer
SanDisk
Type
CompactFlashr
Datasheet

Specifications of SDCFAA-008G

Density
8GByte
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Package Type
Not Required
Mounting
Socket
Pin Count
50
Operating Temperature Classification
Commercial
Programmable
Yes
Lead Free Status / Rohs Status
Supplier Unconfirmed
SanDisk CompactFlash Card OEM Product Manual
02/09, Rev. 1.0 ii © 2007 - 2009 SanDisk Corporation. SanDisk Confidential, subject to all applicable non-disclosure agreements.
3.2
Electrical Description
The CompactFlash Memory Card Series is optimized for operation with hosts, which support the
PCMCIA I/O interface standard conforming to the PC Card ATA specification. However, the
card may also be configured to operate in systems that support only the memory interface
standard. The CompactFlash card configuration is controlled using the standard PCMCIA
configuration registers starting at address 200h in the Attribute Memory space of the card.
Table 3-4 describes the I/O signals. Signals whose source is the host are designated as inputs
while signals that the card sources are outputs. SanDisk CompactFlash Memory Card logic
levels conform to those specified in Section 3.3 of the PCMCIA Release 2.1 Specification.
NOTE: The sleep-to-write and sleep-to-read times are the time it takes the card to exit sleep
The SanDisk CompactFlash Memory Card signals are described in Table 3-4.
Table 3-4 Signal Description
A10 – A00
(PC Card Memory Mode)
A10 – A00
(PC Card I/O Mode)
A02 - A00
(True IDE Mode)
BVD1
(PC Card Memory Mode)
-STSCHG
(PC Card I/O Mode)
Status Changed
-PDIAG
(True IDE Mode)
BVD2
(PC Card Memory Mode)
-SPKR
(PC Card I/O Mode)
-DASP
(True IDE Mode)
-CD1, -CD2
(PC Card Memory Mode)
-CD1, -CD2
(PC Card I/O Mode)
Signal Name
mode when any command is issued by the host to when the card is reading or writing.
CompactFlash Memory cards do not require a reset to exit sleep mode.
I
I
I/O
I/O
O
Dir.
8,10,11,12,
14,15,16,17,
18,19,20
18,19,20
46
45
26,25
Pin
15
These address lines along with the -REG
signal are used to select the following:
The I/O port address registers within the
CompactFlash Storage Card or CF+ Card,
the memory mapped port address
registers within the CompactFlash Storage
Card or CF+ Card, a byte in the card's
information structure and its configuration
control and status registers.
This signal is the same as the PC Card
Memory Mode signal.
In True IDE Mode, only A [02:00] are used
to select the one of eight registers in the
Task File, the remaining address lines
should be grounded by the host.
This signal is asserted high, as BVD1 is
not supported.
This signal is asserted low to alert the host
to changes in the READY and Write
Protect states, while the I/O interface is
configured. Its use is controlled by the
Card Config and Status Register.
In the True IDE Mode, this input / output is
the Pass Diagnostic signal in the Master /
Slave handshake protocol.
This signal is asserted high, as BVD2 is
not supported.
This line is the Binary Audio output from
the card. If the Card does not support the
Binary Audio function, this line should be
held negated.
In the True IDE Mode, this input/output is
the Disk Active/Slave Present signal in the
Master/Slave handshake protocol.
These Card Detect pins are connected to
ground on the CompactFlash Storage
Card or CF+ Card. They are used by the
host to determine that the CompactFlash
Storage Card or CF+ Card is fully inserted
into its socket.
This signal is the same for all modes.
Description
Interface Description

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