M25P16-VMN3TPB Micron Technology Inc, M25P16-VMN3TPB Datasheet - Page 35

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M25P16-VMN3TPB

Manufacturer Part Number
M25P16-VMN3TPB
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M25P16-VMN3TPB

Lead Free Status / Rohs Status
Compliant

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8
Figure 21. Power-up timing
Table 8.
1. These parameters are characterized only.
Initial delivery state
The device is delivered with the memory array erased: all bits are set to ‘1’ (each byte
contains FFh). The Status Register contains 00h (all Status Register bits are 0).
V CC (max)
Symbol
V CC (min)
t
t
PUW
V
VSL
WI
(1)
(1)
V WI
(1)
V CC
V
Time delay to Write instruction
Write Inhibit voltage
Power-up timing and V
Reset state
CC
device
of the
(min) to S Low
Program, Erase and Write commands are rejected by the device
Chip selection not allowed
Parameter
WI
threshold
tPUW
tVSL
Read access allowed
Min
1.0
30
1
Device fully
accessible
Max
2.1
10
AI04009C
time
Unit
ms
µs
35/59
V

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