AC101LKQT Broadcom, AC101LKQT Datasheet - Page 27

• Manufacturer Part Number: AC101LKQT
• Manufacturer: Broadcom

Specifications of AC101LKQT

• Number Of Receivers: 1
• Data Rate: 10/100Mbps
• Package Type: TQFP
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / Rohs Status: Not Compliant

03/10/03
R
Document
Bit
1.15
1.14
1.13
1.12
1.11
1.[10:7]
1.6
1.5
1.4
1.3
1.2
1.1
1.0
EGISTER
AC101L-DS05-R
Name
100BASE-T4
100BASE-TX
Full-Duplex
100BASE-TX
Half-Duplex
10BASE-T
Full-Duplex
10BASE-T
Half-Duplex
Reserved
MF Preamble
Suppression
ANEN Complete
Remote Fault
ANEN Ability
Link Status
Jabber Detect
Extended
Capability
1: S
TATUS
R
Description
Permanently tied to zero; indicates no 100BASE-T4 capability.
1 = 100BASE-TX full-duplex capable.
0 = Not 100BASE-TX full-duplex capable.
Default value:
SPD100 && DUPLEX
1 = 100BASE-TX half-duplex capable.
0 = Not TX half-duplex capable.
Default value:
1 = 10BASE-T full-duplex capable.
0 = Not 10BASE-T full-duplex capable.
Default value:
DUPLEX && (ANEN || !SPD100)
1 = 10BASE-T half-duplex capable.
0 = Not 10BASE-T half-duplex capable.
Default value:
ANEN || (!SPD100 && !DUPLEX)
–
The PHY is able to perform management transaction without MDIO
preamble. The management interface needs a minimum of 32 bits of
preamble after reset.
1 = Auto-negotiation process completed. Registers 4, 5, and 6 are valid
after this bit is set.
0 = Auto-negotiation process is not completed.
1 = Remote fault condition detected.
0 = No remote fault.
This bit remains set until it is cleared by reading register 1.
1 = Able to perform the auto-negotiation function; default value is
determined by the ANEN pin.
0 = Unable to perform the auto-negotiation function.
1 = Link is established. If the link fails, this bit clears and remains at 0 until
the register is read again.
0 = Link is down.
1 = Jabber condition detected.
0 = No Jabber condition detected.
1 = Extended register capable. This bit is tied permanently to a value of 1.
SPD100 && (ANEN || !DUPLEX).
EGISTER
Table 5: Register 1: Status Register
B roa dcom
Mode
RO
RO
RO
RO
RO
RO
RO
RO
RO/LH
RO
RO/LL
RO/LH
RO
Default
0
See
description
See
description
See
description
See
description
0000
1
0
0
Set by
ANEN
0
0
1
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