LM5071HEEVAL National Semiconductor, LM5071HEEVAL Datasheet - Page 5

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LM5071HEEVAL

Manufacturer Part Number
LM5071HEEVAL
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM5071HEEVAL

Lead Free Status / Rohs Status
Not Compliant
Input UVLO and UVLO Hysteresis
The input UVLO threshold and UVLO hysteresis can be
independently programmed by selecting R5 and R37. The
UVLO release threshold level is mainly determined by the
ratio of R37 and R5, as governed by the following equation,
where V
diode of the input current steering bridge. The UVLO hyster-
esis is determined by the following equation:
The evaluation board uses 33.2 kΩ for R37 and 590 kΩ for
R5, setting the UVLO release threshold at about 39V and a
UVLO hysteresis of 5.9V. The use of C1 helps filter out input
voltage transients, thus preventing faulty activation or re-
lease of the input UVLO.
AUX Power Option
For AUX power option, the circuitry tied to the AUX pin forces
the UVLO to release in order to allow operation at an AUX
voltage as low as 10.5V (9.5V seen by the VIN pin of the
LM5071 IC). Note that the AUX pin references VEE while the
auxiliary supply references RTN, which will be different by
one diode drop until the internal hot swap MOSFET is en-
gaged.
It is required that D2 be installed when the AUX input is lower
than 14V. This will bypass the internal startup regulator and
directly supply the bias voltage to the LM5071 IC for startup.
Use CMHD4448 or equivalent for D2. When the switching
circuit establishes stable operation, Vcc will be provided by a
transformer winding with a level up to 16V. This voltage may
damage the internal startup regulator by back feeding to the
lower potential VIN line. To solve this problem, D3 is intro-
duced to protect the IC by bypassing the back feed path and
clamping the VCC pin. On the evaluation board, D3 has
already been installed. However, for applications where the
input voltage is always higher than 18V, D3 can be removed
to save the BOM cost.
Small value resistors in series with the auxiliary input limit
the inrush current from the auxiliary supply. They should be
made as large as is practical given the design constraints.
Special attention should be paid to the selection of D1, D2,
D3, D4 and Q3. They all should be low leakage current
devices. Otherwise the leakage current during PoE opera-
tion will create a false signal at the AUX pin of the IC as if the
circuit is powered from the AUX source. Most diode and
transistor datasheets provide information on the maximum
leakage current at both 25˚C and 125˚C, although the data
for the intermediate temperatures are not often given. It can
be approximated that the leakage current doubles for every
10˚C temperature rise.
The junction temperature of these devices should not reach
125˚C because the only dissipation inside these devices is
due to the leakage current. Therefore it is not necessary to
select the devices based on the maximum leakage current
specified at 125˚C. The evaluation board design considered
F
stands for the forward voltage drop of a single
UVLO_hysteresis = 10µA x R5
5
55˚C as the maximum junction temperature of these de-
vices, which is true for most PoE applications. At 55˚C, the
selection of S3BB-13 for D1, CRH01 for D3, CMHD4448 for
D4 and CMPT5401 for Q3, will not cause a false signal at
AUX pin.
When designing a PD for the higher temperature require-
ment of some particular application, the values of R19, R23,
R29 and R30 should be chosen such that the voltage cre-
ated across R19 does not exceed 0.5V during PoE opera-
tion.
The AUX pin is not reverse protected, and an additional
reverse blocking diode will be required for complete auxiliary
input reverse protection.
Flyback Converter Topology
The dc-dc converter stage of the LM5071 evaluation board
features the flyback topology, which employs the minimum
number of power components to implement an isolated
power supply at the lowest possible cost.
A unique characteristic of the flyback topology is its power
transformer. Unlike an ordinary power transformer that si-
multaneously transfers the power from the primary to the
secondary, the flyback transformer first stores the energy in
the transformer core every switching cycle when the main
switch is turned on; and then releases the stored energy to
the load during the rest of the cycle. When the stored energy
is not completely released before the main switch is turned
on again, it is said that the flyback converter operates in
continuous conduction mode (CCM). Otherwise, it is in dis-
continuous conduction mode (DCM).
Major advantages of CCM over DCM include (i) lower ripple
current and ripple voltage, requiring smaller input and output
filter capacitors; and (ii) lower rms current, thus reducing the
conduction losses. To keep the flyback converter in CCM at
light load, the transformer’s primary inductance should be
designed as large as is practical.
Major drawbacks of CCM, as compared to DCM, are (i) the
presence of the Right-Half-Plane Zero which may limit the
achievable bandwidth of the feedback loop; and (ii) the need
for slope compensation to stabilize the feedback loop at duty
cycles greater than 50%. The flyback topology can have
multiple secondary windings for multi output channels. One
or more of these secondary channels are normally utilized
internally by the converter itself to provide necessary bias
voltages for the controller and other devices.
The evaluation board uses a small power transformer having
a primary inductance of 32 µH. This is a compromise made
to allow the small transformer to operate over a wide input
voltage range from 14V to 60V. However, with this trans-
former, the flyback converter runs in CCM at full load for
input voltages lower than 42V, and in DCM for higher input
voltages or light loads. The LM5071’s built-in slope compen-
sation helps stabilize the feedback loop when the duty cycle
exceeds 50% in the low input voltage range.
A transformer winding is used to provide the bias voltage
(V
includes an internal startup regulator which can support the
bias requirement indefinitely, the transformer winding pro-
duces a V
output, thus shutting off the startup regulator and reducing
the power dissipation inside the IC.
CC
) to the LM5071 IC. Although the LM5071 controller
CC
about 2V higher than the startup regulator
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