ADC082S051EVAL National Semiconductor, ADC082S051EVAL Datasheet

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ADC082S051EVAL

Manufacturer Part Number
ADC082S051EVAL
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of ADC082S051EVAL

Lead Free Status / Rohs Status
Not Compliant
© 2008 National Semiconductor Corporation
ADC082S051
2 Channel, 200 ksps to 500 ksps, 8-Bit A/D Converter
General Description
The ADC082S051 is a low-power, two-channel CMOS 8-bit
analog-to-digital converter with a high-speed serial interface.
Unlike the conventional practice of specifying performance at
a single sample rate only, the ADC082S051 is fully specified
over a sample rate range of 200 ksps to 500 ksps. The con-
verter is based on a successive-approximation register archi-
tecture with an internal track-and-hold circuit. It can be
configured to accept one or two input signals at inputs IN1
and IN2.
The output serial data is straight binary, and is compatible with
several standards, such as SPI™, QSPI™, MICROWIRE,
and many common DSP serial interfaces.
The ADC082S051 operates with a single supply that can
range from +2.7V to +5.25V. Normal power consumption us-
ing a +3V or +5V supply is 2.2 mW and 7.1 mW, respectively.
The power-down feature reduces the power consumption to
just 0.12 µW using a +3V supply, or 0.35 µW using a +5V
supply.
The ADC082S051 is packaged in an 8-lead MSOP package.
Operation over the industrial temperature range of −40°C to
+85°C is guaranteed.
Pin-Compatible Alternatives by Resolution and Speed
All devices are fully pin compatible.
Connection Diagram
Ordering Information
TRI-STATE® is a trademark of National Semiconductor Corporation
QSPI™ and SPI™ are trademarks of Motorola, Inc.
ADC082S051CIMM
ADC082S051CIMMX
ADC082S051EVAL
Resolution
Order Code
12-bit
10-bit
8-bit
50 to 200 ksps
ADC122S021
ADC102S021
ADC082S021
Temperature Range
−40°C to +85°C
−40°C to +85°C
201120
Specified for Sample Rate Range of:
200 to 500 ksps
Features
Key Specifications
Applications
ADC122S051
ADC102S051
ADC082S051
8-Lead MSOP Package, Tape & Reel
Specified over a range of sample rates.
Two input channels
Variable power management
Single power supply with 2.7V - 5.25V range
DNL
INL
SNR
Power Consumption
— 3V Supply
— 5V Supply
Portable Systems
Remote Data Acquisition
Instrumentation and Control Systems
8-Lead MSOP Package
20112005
Evaluation Board
Description
500 ksps to 1 Msps
ADC122S101
ADC102S101
ADC082S101
+ 0.12/−0.062 LSB (typ)
±0.09 LSB (typ)
August 1, 2008
www.national.com
Top Mark
49.5 dB (typ)
2.2 mW (typ)
7.1 mW (typ)
X04C
X04C

ADC082S051EVAL Summary of contents

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... ADC102S021 8-bit ADC082S021 Connection Diagram Ordering Information Order Code ADC082S051CIMM ADC082S051CIMMX ADC082S051EVAL TRI-STATE® trademark of National Semiconductor Corporation QSPI™ and SPI™ are trademarks of Motorola, Inc. © 2008 National Semiconductor Corporation Features ■ Specified over a range of sample rates. ■ Two input channels ■ ...

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Block Diagram Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I/O IN1 and IN2 5,4 DIGITAL I/O 8 SCLK 7 DOUT 6 DIN 1 CS POWER SUPPLY GND www.national.com Description Analog inputs. These signals can ...

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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Analog Supply Voltage V A Voltage on Any Pin to GND Input Current at Any Pin (Note 3) Package Input Current (Note 3) Power Consumption 25°C A ESD Susceptibility (Note 5) ...

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Symbol Parameter ANALOG INPUT CHARACTERISTICS V Input Range Leakage Current DCL C Input Capacitance INA DIGITAL INPUT CHARACTERISTICS V Input High Voltage IH V Input Low Voltage IL I Input Current IN C Digital Input Capacitance IND ...

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ADC082S051 Timing Specifications The following specifications apply for pF, Boldface limits apply for T L Symbol Parameter t Setup Time SCLK High to CS Falling Edge CSU t Hold time SCLK Low to CS Falling Edge ...

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Timing Diagrams www.national.com ADC082S051 Operational Timing Diagram 20112008 Timing Test Circuit ADC082S051 Serial Timing Diagram 20112050 SCLK and CS Timing Parameters 6 20112051 20112006 ...

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Specification Definitions ACQUISITION TIME is the time required to acquire the input voltage. That is time required for the hold capacitor to charge up to the input voltage. APERTURE DELAY is the time between the fourth falling SCLK ...

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Typical Performance Characteristics f = 3.2 MHz to 8 MHz 40.2 kHz unless otherwise stated. SCLK IN DNL - V = 3.0V A DNL - V = 5.0V A DNL vs. Supply www.national.com T = +25° ...

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DNL vs. Clock Frequency 20112024 DNL vs. Clock Duty Cycle 20112026 DNL vs. Temperature 20112028 INL vs. Clock Frequency INL vs. Clock Duty Cycle INL vs. Temperature 9 20112025 20112027 20112029 www.national.com ...

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SNR vs. Supply SNR vs. Clock Frequency SNR vs. Clock Duty Cycle www.national.com THD vs. Supply 20112030 THD vs. Clock Frequency 20112031 THD vs. Clock Duty Cycle 20112032 10 20112035 20112036 20112037 ...

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SNR vs. Input Frequency 20112033 SNR vs. Temperature 20112034 SFDR vs. Supply 20112040 THD vs. Input Frequency THD vs. Temperature SINAD vs. Supply 11 20112038 20112039 20112045 www.national.com ...

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SFDR vs. Clock Frequency SFDR vs. Clock Duty Cycle SFDR vs. Input Frequency www.national.com SINAD vs. Clock Frequency 20112041 SINAD vs. Clock Duty Cycle 20112042 SINAD vs. Input Frequency 20112043 12 20112046 20112047 20112048 ...

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SFDR vs. Temperature 20112044 ENOB vs. Supply 20112052 ENOB vs. Clock Duty Cycle 20112054 SINAD vs. Temperature ENOB vs. Clock Frequency ENOB vs. Input Frequency 13 20112049 20112053 20112055 www.national.com ...

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ENOB vs. Temperature Spectral Response - 5V, 200 ksps Spectral Response - 5V, 500 ksps www.national.com Spectral Response - 3V, 200 ksps 20112056 Spectral Response - 3V, 500 ksps 20112060 Power Consumption vs. Throughput 20112065 14 20112059 20112064 20112061 ...

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Applications Information 1.0 ADC082S051 OPERATION The ADC082S051 is a successive-approximation analog-to- digital converter designed around a charge-redistribution dig- ital-to-analog converter. Simplified schematics of the AD- C082S051 in both track and hold modes are shown in Figures 1, 2, respectively. In ...

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See Tables 1, 2 and Table and SCLK go low within the times defined the rising edge of SCLK that begins ...

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ADC082S051 TRANSFER FUNCTION The output format of the ADC082S051 is straight binary. Code transitions occur midway between successive integer LSB values. The LSB width for the ADC082S051 is V 4.0 TYPICAL APPLICATION CIRCUIT A typical application of the ADC082S051 ...

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ANALOG INPUTS An equivalent circuit for one of the ADC082S051's input chan- nels is shown in Figure 5. Diodes D1 and D2 provide ESD protection for the analog inputs time should any input go beyond (V + ...

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Physical Dimensions inches (millimeters) unless otherwise noted Order Number ADC082S051CIMM, ADC082S051CIMMX 8-Lead MSOP NS Package Number P0MUA08A 19 www.national.com ...

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