CAT24C512XI-T2 ON Semiconductor, CAT24C512XI-T2 Datasheet

no-image

CAT24C512XI-T2

Manufacturer Part Number
CAT24C512XI-T2
Description
IC, EEPROM, 512KBIT SERIAL 1MHZ SOIC-8
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT24C512XI-T2

Memory Size
512Kbit
Memory Configuration
64K X 8
Ic Interface Type
I2C
Clock Frequency
1MHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOIC
No. Of Pins
8
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT24C512XI-T2
Manufacturer:
ON Semiconductor
Quantity:
10 750
CAT24C512
512 kb I
EEPROM
Description
organized as 65,536 words of 8 bits each.
(100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I
protects the entire memory).
CAT24C512 devices on the same bus.
Features
© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 1
A
The CAT24C512 is a 512 kb Serial CMOS EEPROM, internally
It features a 128−byte page write buffer and supports the Standard
Write operations can be inhibited by taking the WP pin High (this
External address pins make it possible to address up to eight
(SCL and SDA)
Compliant
Supports Standard, Fast and Fast−Plus I
1.8 V to 5.5 V Supply Voltage Range
128−Byte Page Write Buffer
Hardware Write Protection for Entire Memory
Schmitt Triggers and Noise Suppression Filters on I
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
8−pin PDIP, SOIC, TSSOP and 8−pad UDFN Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
2
, A
1
SCL
, A
WP
0
Figure 1. Functional Symbol
2
CAT24C512
C CMOS Serial
V
V
CC
SS
2
SDA
C Protocol
2
C protocol.
2
C Bus Inputs
1
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
CASE 751BD
W SUFFIX
Pin Name
A
SOIC−8
0
For the location of Pin 1, please consult the
corresponding package drawing.
, A
SDA
SCL
V
WP
V
CC
SS
1
, A
ORDERING INFORMATION
CASE 646AA
V
A
A
A
SS
L SUFFIX
2
PIN CONFIGURATION
PDIP−8
0
1
2
TSSOP (Y), UDFN (HU5)
PDIP (L), SOIC (W, X),
http://onsemi.com
PIN FUNCTION
CASE 517BU
HU5 SUFFIX
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
UDFN−8
1
Publication Order Number:
CASE 948AL
TSSOP−8
Y SUFFIX
Function
CASE 751BE
V
WP
SCL
SDA
CAT24C512/D
X SUFFIX
CC
SOIC−8

Related parts for CAT24C512XI-T2

CAT24C512XI-T2 Summary of contents

Page 1

CAT24C512 2 512 CMOS Serial EEPROM Description The CAT24C512 is a 512 kb Serial CMOS EEPROM, internally organized as 65,536 words of 8 bits each. It features a 128−byte page write buffer and supports the Standard (100 ...

Page 2

MARKING DIAGRAMS 24512A = Specific Device Code A = Assembly Location Code 24512A Y = Production Year (Last Digit) AYMXXX M = Production Month (1− XXX = Last Three Digits of Assembly Lot Number G = ...

Page 3

Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Storage Temperature Voltage on any Pin with Respect to Ground (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is ...

Page 4

Table 5. A.C. CHARACTERISTICS −40°C to +85°C and Symbol Parameter F Clock Frequency SCL t START Condition Hold Time HD:STA t Low Period of SCL Clock LOW t ...

Page 5

Power-On Reset (POR) The CAT24C512 incorporates Power−On Reset (POR) circuitry which protects the internal logic against powering up in the wrong state. The device will power up into Standby mode after V exceeds the POR trigger level and will power ...

Page 6

SCL SDA START CONDITION BUS RELEASE DELAY (TRANSMITTER) SCL FROM 1 MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER START LOW SCL t SU:STA t HD:STA SDA IN SDA OUT Figure 2. Start/Stop Timing 1 0 ...

Page 7

WRITE OPERATIONS Byte Write In Byte Write mode the Master sends a START, followed by Slave address, two byte address and data to be written (Figure 6). The Slave acknowledges all 4 bytes, and the Master then follows up with ...

Page 8

BUS ACTIVITY: SLAVE R MASTER ADDRESS T SDA LINE S SCL SDA 8th Bit Byte n S BUS T ACTIVITY: A SLAVE MASTER R ADDRESS A − SDA LINE ADDRESS ...

Page 9

READ OPERATIONS Immediate Address Read In standby mode, the CAT24C512 internal address counter points to the data byte immediately following the last byte accessed by a previous operation. If that ‘previous’ byte was the last byte in memory, then the ...

Page 10

PIN # 1 IDENTIFICATION D TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA−01 ISSUE A SYMBOL ...

Page 11

PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...

Page 12

E1 e TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O SYMBOL MIN A A1 0.05 A2 ...

Page 13

Í Í Í E PIN 1 REFERENCE Í Í Í Í Í Í 0.15 C 0.15 C TOP VIEW DETAIL NOTE 4 C SIDE VIEW 0. ...

Page 14

PIN#1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with EIAJ EDR-7320. PACKAGE DIMENSIONS SOIC−8, 208 mils CASE 751BE−01 ISSUE O SYMBOL ...

Page 15

... The device used in the above example is a CAT24C512WI−GT3 (SOIC−JEDEC, Industrial Temperature, NiPdAu, Tape & Reel, 3,000/Reel). 12. For SOIC, EIAJ (X) package the standard lead finish is Matte−Tin. This package is available in 2,000 pcs/reel, i.e., CAT24C512XI−T2. 13. Part number is not exactly the same as the “Example of Ordering Information” shown above. For part numbers marked with * there are NO hyphens in the orderable part numbers ...

Related keywords