M58WR032KU70ZA6U NUMONYX, M58WR032KU70ZA6U Datasheet - Page 45
M58WR032KU70ZA6U
Manufacturer Part Number
M58WR032KU70ZA6U
Description
NUMM58WR032KU70ZA6U NUM 32MB NOR FLASH P
Manufacturer
NUMONYX
Datasheet
1.M58WR032KU70ZA6U.pdf
(123 pages)
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8.11
Burst length bits (CR2-CR0)
The Burst Length bits set the number of words to be output during a Synchronous Burst
Read operation as result of a single address latch cycle. They can be set for 4 words, 8
words, 16 words or continuous burst, where all the words are read sequentially.
In continuous burst mode the burst sequence can cross bank boundaries.
In continuous burst mode or in 4, 8, 16 words no-wrap, depending on the starting address,
the device asserts the WAIT output to indicate that a delay is necessary before the data is
output.
If the starting address is aligned to a 4 word boundary no wait states are needed and the
WAIT output is not asserted.
If the starting address is shifted by 1, 2 or 3 positions from the four word boundary, WAIT will
be asserted for 1, 2 or 3 clock cycles when the burst sequence crosses the first 16 word
boundary, to indicate that the device needs an internal delay to read the successive words in
the array. WAIT will be asserted only once during a continuous burst access. See also
Table 13: Burst type
CR4 is reserved for future use.
definition.
Configuration Register
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