A2F200M3F-FGG484 Actel, A2F200M3F-FGG484 Datasheet - Page 89

• Manufacturer Part Number: A2F200M3F-FGG484
• Description: ACLA2F200M3F-FGG484 SMART FUSION MIX SIG
• Manufacturer: Actel

Embedded Nonvolatile Memory Block (eNVM)
Table 2-87 • eNVM Block Timing, Worst Commercial Case Conditions: T
Embedded FlashROM (eFROM)
Table 2-88 • FlashROM Access Time, Worse Commercial Case Conditions: T
JTAG 1532 Characteristics
Table 2-89 • JTAG 1532
Parameter
t
t
Note:
t
F
Parameter
t
t
t
t
t
t
F
Note:
FMAXCLKeNVM
FMAXCLKeNVM
Parameter
CK2Q
DISU
DIHD
TMSSU
TMDHD
TCK2Q
RSTB2Q
max
TCKMAX
*6:1:1:1 indicates 6 cycles for the first access and 1 each for the next three accesses. 5:1:1:1 indicates 5 cycles
for the first access and 1 each for the next three accesses.
For specific junction temperature and voltage supply levels, refer to
Worst Commercial-Case Conditions: T
Electrical Characteristics
Table 2-87
Electrical Characteristics
Table 2-88
JTAG timing delays do not include JTAG I/Os. To obtain complete JTAG timing, add I/O buffer delays to
the corresponding standard selected; refer to the I/O timing characteristics in the
Characteristics" section on page 2-21
Timing Characteristics
Maximum frequency for clock for the control logic – 6 cycles
(6:1:1:1*)
Maximum frequency for clock for the control logic – 5 cycles
(5:1:1:1*)
Clock to out
Maximum Clock frequency
describes the eNVM maximum performance.
describes the eFROM maximum performance
Test Data Input Setup Time
Test Data Input Hold Time
Test Mode Select Setup Time
Test Mode Select Hold Time
Clock to Q (data out)
Reset to Q (data out)
TCK Maximum Frequency
Description
Description
for more details.
Description
J
= 85°C, Worst-Case VCC = 1.425 V
R e v i s i o n 3
Actel SmartFusion Intelligent Mixed Signal FPGAs
Table 2-7 on page 2-9
J
= 85°C, VCC = 1.425 V
100
–1
80
A2F200
J
= 85°C, VCC = 1.425 V
Std.
N/A
80
28.68
15.00
–1
26.67
19.00
0.67
1.33
0.67
1.33
8.00
100
–1
50
–1
for derating values.
A2F500
Std.
80
50
"User I/O
Units
MHz
Units
MHz
ns
ns
ns
ns
ns
ns
ns
Units
MHz
MHz
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