SI4730-D60-GM Silicon Laboratories Inc, SI4730-D60-GM Datasheet - Page 11
SI4730-D60-GM
Manufacturer Part Number
SI4730-D60-GM
Description
IC RADIO RX AM/FM/AUX 20QFN
Manufacturer
Silicon Laboratories Inc
Series
-r
Datasheet
1.SI4731-D60-EVB.pdf
(42 pages)
Specifications of SI4730-D60-GM
Frequency
520kHz ~ 1.71MHz, 64MHz ~ 108MHz
Sensitivity
-
Data Rate - Maximum
-
Modulation Or Protocol
AM, FM
Applications
General Purpose
Current - Receiving
-
Data Interface
PCB, Surface Mount
Memory Size
-
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-
Package / Case
20-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4730-D60-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
SI4730-D60-GMR/
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Table 6. 3-Wire Control Interface Characteristics
(V
Parameter
SCLK Frequency
SCLK High Time
SCLK Low Time
SDIO Input, SEN to SCLKSetup
SDIO Input to SCLKHold
SEN Input to SCLK
SCLKto SDIO Output Valid
SCLKto SDIO Output High Z
SCLK, SEN, SDIO, Rise/Fall time
Note: When selecting 3-wire mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the
A
= 2.7 to 5.5 V, V
rising edge of RST.
SCLK
SCLK
SDIO
SDIO
SEN
SEN
70%
30%
70%
30%
70%
30%
70%
30%
70%
30%
70%
30%
D
= 1.62 to 3.6 V, T
Hold
Figure 4. 3-Wire Control Interface Write Timing Parameters
Figure 5. 3-Wire Control Interface Read Timing Parameters
t
t
S
S
A7
A7
A
= –20 to 85 °C)
Symbol
Address In
t
t
t
t
HSDIO
t
t
HSEN
t
t
R
f
Address In
HIGH
LOW
R
CDV
CLK
CDZ
t
, t
A6-A5,
S
A6-A5,
A4-A1
A4-A1
R/W,
R/W,
F
t
F
t
t
S
S
Rev. 1.0
Test Condition
A0
A0
t
t
HSDIO
HSDIO
Read
Read
½ Cycle Bus
Turnaround
t
D15
HIGH
t
CDV
Si4730/31/34/35-D60
D15
t
LOW
D14-D1
Data In
Min
25
25
20
10
10
—
0
2
2
D14-D1
Data Out
D0
t
t
HSEN
HSEN
Typ
—
—
—
—
—
—
—
—
—
D0
Max
2.5
25
25
10
—
—
—
—
—
t
CDZ
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
11