MC33560DWR2G ON Semiconductor, MC33560DWR2G Datasheet - Page 14

• Manufacturer Part Number: MC33560DWR2G
• Description: IC INTERFACE PWR MANAGMT 24SOIC
• Manufacturer: ON Semiconductor

Specifications of MC33560DWR2G

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 24-SOIC (7.5mm Width)
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC33560DWR2GOS

The micro controller has to insert an additional delay (in the
ms range) to allow the card contacts to stabilize in the card
connector before setting PWRON
activates the powerdown sequence and stops the converter,
regardless of the PWRON signal. The 50 ms delay of the
debouncer is enough to ensure that all card signals have
reached a safe value before communication with the card
takes place.
CARD STATUS
MC33560 status by interrupt and by polling. When a card is
extracted or inserted, the INT line is asserted low. The
interrupt is cleared upon the rising edge of CS or upon the
rising edge of PWRON
reading the RDYMOD pin with proper PWRON setting
(see Tables 2 and 4).
resistor (240 kW typical), their rise time can be as long as
10 ms if parasitic capacitance is high and no other pullup
circuitry is connected.
POWER MANAGER
circuit functions which are needed for a determined operating
mode in order to minimize power consumption (Figure 19).
only the “card present” detector alive. All card interface pins
are forced to ground potential.
(
starts the DC−DC converter. As soon as the CRDV
supply reaches the operating voltage range, the circuit
activates the card signals in the following sequence:
or forced card extraction, the CRDV
down and the card signal deactivation sequence takes place:
C8) are put into high impedance state to avoid signal
collision with the microcontroller in transmission mode.
BATTERY UNDERVOLTAGE DETECTOR
to allow operation of the DC−DC converter only with valid
voltage (typically 1.5 V). The comparator has been designed
to have stability better than 20 mV in the temperature range.
DC−DC CONVERTER
converter generates the CRDV
PWRON L to H transition, CS
The card detector has an internal 50 ms debouncing delay.
When the card detector circuit detects a card extraction, it
The controlling microprocessor is informed of the
The microprocessor can poll the status at any time by
Since INT and RDYMOD have a high value pullup
The task of the power manager is to activate only those
In standby mode
In the event of a powerup request from the microcontroller
CRDV
At the end of the transaction
CRDRST, CRDC4/C8, CRDCLK, CRDIO, CRDV
When CS
The task of this block is to monitor the supply voltage, and
Upon request from the power manager, the DC−DC
CC
, CRDIO, CRDCLK, CRDC4/C8, CRDRST
=
L, the bi−directional signal lines
(
PWRON
(
INT line set to high state).
=
(
PWRON reset to L, CS = L)
CC
L) the power manager keeps
=
supply for the smartcard.
=
L) the power manager
H.
CC
supply powers
(I/O
, C4 and
http://onsemi.com
CC
CC
MC33560
14
The output voltage is programmable for 3.0 V or 5.0 V (see
Table 3) to guarantee full cross compatibility of the reader
for 5.0 V and 3.0 V smartcards. The wide voltage supply
range, 1.8 V < V
of coupler applications with different battery configurations
(single cell or multiple cells, serial or parallel connections).
To avoid excessive battery loading during a card
short−circuit, a current integration function forces the
powerdown sequence (Figure 28). To retry the session, the
microprocessor works through the power on sequence as
defined in the power manager section.
DC−DC CONVERTER OPERATING PRINCIPLES
allows step−up and step−down voltage conversion to be
done. The unique regulation architecture permits an
automatic transition from step−up to step−down, and from
zero to full load, without affecting the output characteristics.
architecture is very similar to the boost architecture, with an
active rectifier in place of the diode. The switching transistor
is connected to ground through a resistor network in order to
adjust the maximum peak current (Figure 22). A transistor
connected to the converter output
to a low voltage when the converter is not operating. This
prevents erratic voltage supply to the smartcard when not
in use.
converter requires only one inductor and the output filtering
capacitor to operate.
lower than the battery voltage, the converter operates like a
boost converter; the active rectifier behavior is similar to
that of a diode.
higher than the battery voltage, the rectifier control circuit
puts the power rectifying transistor in conduction when the
L
rectifying transistor is higher than in step−up operation. The
efficiency is lower, and similar to a linear regulator.
features that help to avoid electrical overstress of the
MC33560 and of the smartcard, and help to ensure that data
transmission with the smartcard occurs only when its supply
voltage is within predetermined limits. These functions are:
•
•
•
maximum card supply current programmed with the
external components L1 and RLIM.
supply are preset internally to the MC33560.
1
The CRDV
The DC−DC converter architecture used in the MC33560
DC−DC Converter
The MC33560 has a built in oscillator; the DC−DC
Stepup Operation: When the card supply voltage is
Stepdown Operation: When the card supply voltage is
Fault Detection: The DC−DC converter has several
The level at which current will be limited is defined by the
The undervoltage detection levels for 3.0 V and 5.0 V card
Overtemperature Detection,
Current Limitation, and
Card Supply Undervoltage Detection.
voltage reaches V
CC
BAT
is current−limited and short−circuit−proof.
BAT
< 6.6 V, accommodates a broad range
+ V
Description:
FSAT22
(
CRDV
. The voltage across the
CC
The
) forces this pin
converter