ADM1024ARU-REEL ON Semiconductor, ADM1024ARU-REEL Datasheet - Page 26

• Manufacturer Part Number: ADM1024ARU-REEL
• Description: IC MONITOR SYS TEMP/VOLT 24TSSOP
• Manufacturer: ON Semiconductor

Specifications of ADM1024ARU-REEL

• Rohs Status: RoHS non-compliant
• Applications: PC's, PDA's
• Interface: Serial
• Voltage - Supply: 2.8 V ~ 5.5 V
• Package / Case: 24-TSSOP
• Mounting Type: Surface Mount

1. Any time the Status Register is read out, the conditions (i.e., Register) that are read are automatically reset. In the case of the channel priority
2. In the Mask Register, the errant voltage interrupt may be disabled until the operator has time to clear the errant condition or set the limit
Table 9. Register 40h, Configuration Register 1 (Power−On Default, 08h)
Table 10. Register 41h, Interrupt Status Register 1 (Power−On Default, 00h)
Table 11. Register 42h, Interrupt Status Register 2 (Power−On Default, 00h)
Bit
Bit
Bit
indication, if two or more channels were out of limits, then another indication would automatically be generated if it was not handled during
the ISR.
higher/lower.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
2.5 V/External Temp2
External Temp1 Error
Internal Temp Error
THERM Interrupt
FAN1/A
FAN2/A
Chassis Error
THERM CLR
V
V
INT_Enable
Initialization
5.0 V Error
INT_Clear
12 V Error
Reserved
V
Reserved
Reserved
CCP1
CCP2
D1 Fault
D2 Fault
THERM
RESET
START
Enable
CC
Name
Name
Name
Error
IN1
IN2
Error
Error
Error
Error
Error
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Logic 1 enables startup of ADM1024; Logic 0 places it in standby mode. Caution:
The outputs of the interrupt pins will not be cleared if the user writes a 0 to this
location after an interrupt has occurred (see “INT Clear” bit). At startup, limit
checking functions and scanning begins. Note, all high and low limits should be set
into the ADM1024 prior to turning on this bit (Power−On Default = 0).
Logic 1 enables the INT_output. 1 = Enabled 0 = Disabled (Power−On Default = 0).
0 = THERM disabled
1 = THERM enabled
During Interrupt Service Routine (ISR), this bit is asserted Logic 1 to clear INT output
without affecting the contents of the Interrupt Status Register. The device will stop
monitoring. It will resume upon clearing of this bit. (Power−On Default = 0)
Setting this bit generates a low going 45 ms reset pulse at Pin 12. This bit is
self−clearing and power−on default is 0.
Default = 0
A 1 clears the THERM output without changing the Status Register contents.
Logic 1 restores power−on default values to the Configuration Register, Interrupt
Status Registers, Interrupt Mask Registers, Fan Divisor Register, and the
Temperature Configuration Register. This bit automatically clears itself since the
power−on default is 0.
A 1 indicates that a High or Low limit has been exceeded.
A 1 indicates that a High or Low limit has been exceeded.
A 1 indicates that a High or Low limit has been exceeded.
A 1 indicates that a High or Low limit has been exceeded.
A 1 indicates that a temperature interrupt has been set, or that a High or Low limit
has been exceeded.
A 1 indicates that a temperature interrupt has been set, or that a High or Low limit
has been exceeded.
A 1 indicates that a High or Low limit has been exceeded.
A 1 indicates that a High or Low limit has been exceeded.
A 1 indicates a High or Low limit has been exceeded.
A 1 indicates a High or Low limit has been exceeded.
Undefined.
Undefined.
A 1 indicates Chassis Intrusion has gone high.
Indicates that THERM pin has been pulled low by an external source.
Short or Open−Circuit Sensor Diode D1.
Short or Open−Circuit Sensor Diode D2.
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Description
Description
Description
(Note 1 and 2)