SEH01G72A1BH1MT-30R Swissbit NA Inc, SEH01G72A1BH1MT-30R Datasheet - Page 2

• Manufacturer Part Number: SEH01G72A1BH1MT-30R
• Description: DRAM DDR2 VLP 1GB 244-MINI DIMM
• Manufacturer: Swissbit NA Inc
• Series: -r

Specifications of SEH01G72A1BH1MT-30R

• Memory Type: DDR2 SDRAM
• Memory Size: 1GB
• Speed: 667MHz
• Features: -
• Package / Case: 244-MDIMM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 1052-1045

This Swissbit module is an industry standard 244-pin 8-byte DDR2 SDRAM mini Dual-In-line Memory Module
(miniDIMM) which is organized as x72 high speed CMOS memory arrays. The module uses internally configured
quad-bank DDR2 SDRAM devices. The module uses double data rate architecture to achieve high-speed
operation. DDR2 SDRAM modules operate from a differential clock (CK and CK#). READ and WRITE accesses
to a DDR2 SDRAM module is burst-oriented; accesses start at a selected location and continue for a
programmed number of locations in a programmed sequence. The burst length is either four or eight locations. An
auto precharge function can be enabled to provide a self-timed row precharge that is initiated at the end of a burst
access. The DDR2 SDRAM devices have a multibank architecture which allows a concurrent operation that is
providing a high effective bandwidth. A self refresh mode is provided and a power-saving “power-down” mode. All
inputs and all full drive-strength outputs are SSTL_18 compatible.
The DDR2 SDRAM module uses the serial presence detect (SPD) function implemented via serial EEPROM
using the standard I
utilized by the DIMM manufacturer (swissbit) to identify the module type, the module’s organization and several
timing parameters. The second 128 bytes are available to the end user.
Module Configuration
Timing Parameters
Pin Name
Swissbit AG
Industriestrasse 4 – 8
CH – 9552 Bronschhofen
A0 - A13
BA0, BA1
DQ0 – DQ63
DM0-DM8
RAS#
CAS#
WE#
CKE0
CK0
CK0#
DQS0 – DQS17
DQS0# - DQS17#
S0#
SEH01G72A1BH1MT-30[W]R
Organization
128M x 72bit
Part Number
2
C protocol. This nonvolatile storage device contains 256 bytes. The first 128 bytes are
DDR2 SDRAMs
9 x 128M x 8bit
(1Gbit)
used
82.0 (long) x 18.30(high) x 4 [max] (thickness)
Address Inputs
Bank Address Inputs
Data Input / Output
Input Data Mask
Row Address Strobe
Column Address Strobe
Write Enable
Clock Enable
Clock Input, positive line
Clock Input, negative line
Data Strobe, positive line
Data Strobe, negative line (only used when differential data strobe mode is enabled)
Chip Select
Fon: [phone]
Fax: [phone]
Module Density
1024 MB
Module Dimensions
Data Sheet
Row Addr.
14
in mm
Transfer Rate
Device Bank
BA0, BA1,
5.3 GB/s
Select
BA2
www.swissbit.com
eMail: [e-mail]
Col. Addr. Refresh
Memory clock/Data
10
3.0ns/667MT/s
Rev.1.2
bit rate
8k
10.06.2010
Bank Select
5300-555
Module
Latency
S0#
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