BD9324EFJ-E2 Rohm Semiconductor, BD9324EFJ-E2 Datasheet - Page 9

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BD9324EFJ-E2

Manufacturer Part Number
BD9324EFJ-E2
Description
IC CONVERTER REG 4A HTSOP-J8
Manufacturer
Rohm Semiconductor
Series
-r
Type
Step-Down (Buck), PWM - Current Moder
Datasheet

Specifications of BD9324EFJ-E2

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
1 V ~ 18 V
Current - Output
4A
Frequency - Switching
380kHz
Voltage - Input
4.75 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
(2) Phase compensation
Phase Setting Method
(a) Standard integrator (low-pass filter)
The following conditions are required in order to ensure the stability of the negative feedback circuit.
Because DC/DC converter applications are sampled using the switching frequency, the overall GBW should be set to 1/10
the switching frequency or lower. The target application characteristics can be summarized as follows:
In other words, because the response is determined by the GBW limitation, it is necessary to use higher switching
frequencies to raise response.
One way to maintain stability through phase compensation involves canceling the secondary phase lag (-180°) caused by LC
resonance with a secondary phase advance (by inserting a phase advances).
The GBW (i.e., the frequency with the gain set to 1) is determined by the phase compensation capacitance connected to the
error amp. Increase the capacitance if a GBW reduction is required.
The error amp performs phase compensation of types (a) and (b), making it act as a low-pass filter.
Set a phase advancing frequency close to the LC resonant frequency for the purpose of canceling the LC resonance.
Point (a) fa =
Feedback
xPhase lag should be 150° or lower during gain 1 (0 dB) (phase margin of 30° or higher).
xPhase lag should be 150° or lower during gain 1 (0 dB) (phase margin of 30° or higher).
xThe GBW at that time (i.e., the frequency of a 0-dB gain) is 1/10 of the switching frequency or below.
Vo
R1
R2
R
FB
Fig.
2SRCA
Fig.
1
A
C
A
[Hz]
COMP
C1
R3
COMP
Phase
Gain
[ ° ]
[dB]
-180
-90
Point (b) fb = GBW =
0
0
A
9/14
(b) Open loop characteristics of integrator
LC resonant frequency fp =
Phase advance
(a)
-90°
Phase margin
-20 dB/decade
fz =
Fig.
2SRC
1
GBW(b)
2SC
2S
1
1
1
LC
[Hz]
R
3
-180°
[Hz]
[Hz]
F
F

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