AOZ1036DI Alpha & Omega Semiconductor Inc, AOZ1036DI Datasheet - Page 10

• Manufacturer Part Number: AOZ1036DI
• Description: IC BUCK SYNC ADJ 5A 8DFN
• Manufacturer: Alpha & Omega Semiconductor Inc
• Series: EZBuck™r
• Type: Step-Down (Buck), PWM - Current Moder

Specifications of AOZ1036DI

• Featured Product: The AOZ103x Family Synchronous Buck Regulator
• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 V ~ 18 V
• Current - Output: 5A
• Frequency - Switching: 500kHz
• Voltage - Input: 4.5 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-VDFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 785-1255-2

In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:
Usually, the ripple current rating of the output capacitor
is a smaller issue because of the low current stress.
When the buck inductor is selected to be very small and
inductor ripple current is high, output capacitor could be
overstressed.
External Schottky Diode for High Input Operation
When V
diode is required between LX and PGND for proper
operation.
Loop Compensation
The AOZ1036 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole can be
calculated by:
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
R
ESR
The compensation design is actually to shape the
converter control loop transfer function to get desired
gain and phase. Several different types of compensation
network can be used for the AOZ1036. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1036, FB pin and COMP pin are the inverting
input and the output of internal error amplifier. A series
I
f
CO_RMS
O
L
Z1
f
Rev. 1.1 September 2010
P1
is load resistor value, and
is the output filter capacitor,
CO
=
=
is the equivalent series resistance of output capacitor.
IN
------------------------------------------------
2π C
---------------------------------- -
2π
is higher than 16V, an external 1A schottky
=
×
×
----------
ΔI
C
O
12
1
O
L
1
×
×
ESR
R
L
CO
www.aosmd.com
R and C compensation network connected to COMP
provides one pole and one zero. The pole is:
where;
G
200 x 10
G
C
The zero given by the external compensation network,
capacitor C
To design the compensation circuit, a target crossover
frequency f
crossover frequency is where control loop has unity gain.
The crossover is the also called the converter bandwidth.
Generally a higher bandwidth means faster response to
load transient. However, the bandwidth should not be too
high because of system stability concern. When
designing the compensation loop, converter stability
under all line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of switching frequency. The
AOZ1036 operates at a frequency range from 400kHz to
600kHz. It is recommended to choose a crossover
frequency equal or less than 40kHz.
The strategy for choosing R
cross over frequency with Rc and set the compensator
zero with C
to calculate R
where;
f
f
V
G
200 x 10
G
6.68 A/V.
f
C
C
f
f
R
P2
C
FB
EA
VEA
C
Z2
EA
CS
is desired crossover frequency. For best performance,
is set to be about 1/10 of switching frequency,
C
is compensation capacitor in Figure 1.
=
is 0.8V,
is the error amplifier transconductance, which is
is the error amplifier transconductance, which is
is the current sense circuit transconductance, which is
=
=
is the error amplifier voltage gain, which is 500 V/V, and
=
40kHz
-6
-6
------------------------------------------ -
2π
-----------------------------------
2π
f
C
A/V,
A/V, and
×
C
C
×
C
×
. Using selected crossover frequency, f
for close loop must be selected. The system
--------- -
V
and resistor R
C
C
C
V
G
1
FB
:
C
C
O
EA
×
×
×
R
G
----------------------------- -
G
C
VEA
2π
EA
×
×
C
C
C
G
, is located at:
C
and C
CS
C
is to set the
AOZ1036
Page 10 of 17
C
,