MT41J512M4HX-187E:D Micron Technology Inc, MT41J512M4HX-187E:D Datasheet - Page 38

• Manufacturer Part Number: MT41J512M4HX-187E:D
• Description: IC DDR3 SDRAM 2GBIT 78FBGA
• Manufacturer: Micron Technology Inc
• Series: -r

Specifications of MT41J512M4HX-187E:D

• Format - Memory: RAM
• Memory Type: DDR3 SDRAM
• Memory Size: 2G (512M x 4)
• Speed: 533MHz
• Interface: Parallel
• Voltage - Supply: 1.425 V ~ 1.575 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 78-TFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 19:
PDF: 09005aef826aaadc/Source: 09005aef82a357c3
DDR3_D2.fm - Rev G 2/09 EN
10
11
12
13
14
15
16
17
18
19
0
1
2
3
4
5
6
7
8
9
I
DD
7 Measurement Loop
2 × nFAW + 4 × nRRD + 1
3 × nFAW + 4 × nRRD + 1
Notes:
nFAW + 4 × nRRD + 1
2 × nFAW + nRRD + 1
2 × nFAW + nRRD + 2
2 × nFAW + nRRD + 3
2 × nFAW + 2 × nRRD
2 × nFAW + 3 × nRRD
2 × nFAW + 4 × nRRD
3 × nFAW + 2 × nRRD
3 × nFAW + 3 × nRRD
3 × nFAW + 4 × nRRD
nFAW + 2 × nRRD
nFAW + 3 × nRRD
nFAW + 4 × nRRD
2 × nFAW + nRRD
3 × nFAW + nRRD
nFAW + nRRD
2 × nFAW + 1
2 × nFAW + 2
2 × nFAW + 3
4 × nRRD + 1
2 × nFAW
3 × nFAW
nRRD + 1
nRRD + 2
nRRD + 3
2 × nRRD
3 × nRRD
4 × nRRD
nFAW
nRRD
1. DQs, DQS, DQS# are mid-level unless driven as required by the RD command.
2. DM is LOW.
3. Burst sequence is driven on each DQ signal by the RD command.
4. AL = CL - 1.
0
1
2
3
Electrical Specifications – I
RDA
RDA
RDA
RDA
ACT
ACT
ACT
ACT
D
D
D
D
D
D
D
D
Repeat cycle 2 × nFAW + nRRD + 2 until 2 × nFAW + 2 × nRRD - 1
Repeat cycle 2 × nFAW + 4 × nRRD until 3 × nFAW - 1, if needed
Repeat cycle 3 × nFAW + 4 × nRRD until 4 × nFAW - 1, if needed
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
Repeat cycle nFAW + 4 × nRRD until 2 × nFAW - 1, if needed
Repeat cycle 2 × nFAW + 2 until 2 × nFAW + nRRD - 1
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
Repeat cycle 4 × nRRD until nFAW - 1, if needed
38
Repeat cycle nRRD + 2 until 2 × nRRD - 1
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
Repeat sub-loop 10, use BA[2:0] = 2
Repeat sub-loop 11, use BA[2:0] = 3
Repeat sub-loop 10, use BA[2:0] = 4
Repeat sub-loop 10, use BA[2:0] = 6
Repeat sub-loop 11 use BA[2:0] = 5
Repeat sub-loop 11 use BA[2:0] = 7
Repeat sub-loop 0, use BA[2:0] = 2
Repeat sub-loop 1, use BA[2:0] = 3
Repeat sub-loop 0, use BA[2:0] = 4
Repeat sub-loop 0, use BA[2:0] = 6
Repeat sub-loop 1 use BA[2:0] = 5
Repeat sub-loop 1 use BA[2:0] = 7
Repeat cycle 2 until nRRD - 1
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DD
0
0
0
1
1
1
3
7
0
0
0
1
1
1
3
7
2Gb: x4, x8, x16 DDR3 SDRAM
Specifications and Conditions
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
©2006 Micron Technology, Inc. All rights reserved.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
F
F
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00000000
00110011
00110011
00000000
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–
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