CC-9P-V526UJ-S-B Digi International, CC-9P-V526UJ-S-B Datasheet - Page 27
![no-image](/images/manufacturer_photos/0/1/193/digi_international_sml.jpg)
CC-9P-V526UJ-S-B
Manufacturer Part Number
CC-9P-V526UJ-S-B
Description
MOD 9P 9215 CONNCORE 8MB FLASH
Manufacturer
Digi International
Series
-r
Datasheet
1.CC-9P-V526UJ-EA.pdf
(130 pages)
Specifications of CC-9P-V526UJ-S-B
Module/board Type
Core Module
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Networking
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C o n f i g u r a t i o n p i n s — M o d u l e
Identification of
the module
Module pin
configuration
27
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ConnectCore 9P 9215, Wi-9P 9215, and 3G 9P 9215 Hardware Reference
The ConnectCore 9P 9215 family of modules support the following JTAG signals:
TCK, TMS, TDI, TDO, TRST#, and RTCK. Selection can be made between ARM debug
mode and boundary scan mode with the signal OCD_EN#.
In order to make it easier for software to recognize a module and especially a
hardware variant of the module, a specific bit field made of 4-bits has been
reserved on the module. This bit field can be read out through GEN ID register and
correspond to A[12:9]. These configuration signals use the internal CPU pull-up
resistor and can be pulled down through external population option 2k2 resistors.
In the same way, 3 bits have been available on the module to identify the SDRAM
configuration scheme. This bits correspond to A[19:17]. It is impossible for the user
to disturb either the variant specific or SDRAM configuration specific bits from
outside.
In Addition, the ConnectCore 9P 9215 family of modules have reserved 4 bits for
special platform identification. This bit field can be read out through GEN ID register
and correspond to A[16:13]. Configuration of these signals is done through the
SW_CONF pins. SW_CONF0 is connected to A13 through a 2k2 series resistor, and so on
for the further SW_CONF pins. So this bit can be set high by leaving the corresponding
SW_CONF pin unconnected and set low by connecting the corresponding SW_CONF pin
directly low.
These pins are available for user defined application or platform specific software
configurations.
Note: For the ConnectCore 3G 9P 9215 module, these pins have a reserved usage
described in Appendix C: ConnectCore 3G 9P 9215 Strapping on page 122.
LITTLE#/BIG_
ENDIAN
OCD_EN#
SW_CONF0
Signal name
Set module endianess. 0 module boots in little
endian mode. 1 module boots in big endian
mode.
JTAG / Boundary scan function select
0
1
See note 1.
Function
ARM debug mode, BISTEN# set to high
Boundary scan mode, BISTEN# set to
low
PU
PU 10K
PU/PD
Signal LITTLE#/BIG_ENDIAN
is connected to GPIO_A3/A27
through a 2k2 series resistor.
Connected to A13 through a 2k2
series resistor.
Read bit 4 of GEN ID register (@
0xA0900210).
Comment
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