LMH0344SQ/NOPB National Semiconductor, LMH0344SQ/NOPB Datasheet - Page 15

• Manufacturer Part Number: LMH0344SQ/NOPB
• Description: IC ADAPT CBL EQUALIZER 16-LLP
• Manufacturer: National Semiconductor

Specifications of LMH0344SQ/NOPB

• Applications: Data Transport
• Interface: Serial
• Voltage - Supply: 3.135 V ~ 3.465 V
• Package / Case: 16-LLP
• Mounting Type: Surface Mount
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMH0344SQ

PCB LAYOUT RECOMMENDATIONS
For information on layout and soldering of the LLP package,
pease refer to the following application note: AN-1187,
“Leadless Leadframe Package (LLP).”
The SMPTE 424M, 292M, and 259M standards have strin-
gent requirements for the input return loss of receivers, which
essentially specify how closely the input must resemble a
75Ω network. Any non-idealities in the network between the
BNC and the equalizer will degrade the input return loss. Care
must be taken to minimize impedance discontinuities be-
tween the BNC and the equalizer to ensure that the charac-
teristic impedance of this trace is 75Ω. Please consider the
following PCB recommendations:
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Use surface mount components, and use the smallest
components available. In addition, use the smallest size
component pads.
Select trace widths that minimize the impedance
mismatch between the BNC and the equalizer.
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Select a board stack up that supports both 75Ω single-
ended traces and 100Ω loosely-coupled differential
traces.
Place return loss components closest to the equalizer
input pins.
Maintain symmetry on the complimentary signals.
Route 100Ω traces uniformly (keep trace widths and trace
spacing uniform along the trace).
Avoid sharp bends in the signal path; use 45° or radial
bends.
Place bypass capacitors close to each power pin, and use
the shortest path to connect equalizer power and ground
pins to the respective power or ground planes.
Remove ground plane under input/output components to
minimize parasitic capacitance.
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