PI7C8152AMAE Pericom Semiconductor, PI7C8152AMAE Datasheet - Page 84

• Manufacturer Part Number: PI7C8152AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.1.37
12.1.38
12.1.39
12.1.40
12.1.41
SECONDARY MASTER TIMEOUT COUNTER – OFFSET 80h
CAPABILITY ID REGISTER – OFFSET DCh
NEXT ITEM POINTER REGISTER – OFFSET DCh
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET
DCh
POWER MANAGEMENT DATA REGISTER – OFFSET E0h
Bit
31:16
Bit
7:0
Bit
15:8
Bit
18:16
19
20
21
24:22
25
26
31:27
Bit
1:0
7:2
Function
Secondary
Timeout
Function
Enhanced
Capabilities ID
Function
Next Item
Pointer
Function
Power
Management
Revision
PME_L Clock
Auxiliary Power
Device Specific
Initialization
Reserved
D1 Power State
Support
D2 Power State
Support
PME_L Support
Function
Power State
Reserved
Type
R/W
Type
R/O
Type
R/O
Type
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
Type
R/W
R/O
Page 84 of 90
Description
Secondary timeout occurs after 2
Reset to 8000h.
Description
Read as 01h to indicate that these are power management enhanced
capability registers.
Description
Read as 00h. No other ECP registers.
Description
Read as 010 to indicate the device is compliant to Revision 1.1 of
PCI Power Management Interface Specifications.
Read as 0 to indicate PI7C8152x does not support the PME_L pin.
Read as 0 to indicate PI7C8152x does not support the PME_L pin or
an auxiliary power source.
Read as 0 to indicate PI7C8152x does not have device specific
initialization requirements.
Read as 0
Read as 1 to indicate PI7C8152x supports the D1 power management
state.
Read as 1 to indicate PI7C8152x supports the D2 power management
state.
Read as 0 to indicate PI7C8152x does not support the PME_L pin.
Description
Indicates the current power state of PI7C8152x. If an unimplemented
power state is written to this register, PI7C8152x completes the write
transaction, ignores the write data, and does not change the value of
the field. Writing a value of D0 when the previous state was D3
cause a chip reset without asserting S_RESET_L
00: D0 state
01: D1 state
10: D2 state
11: D3 state
Reset to 0
Read as 0
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
15
PCI clocks.
PI7C8152A & PI7C8152B