ISL54100CQZ Intersil, ISL54100CQZ Datasheet - Page 8

IC REGENERATOR TMDS 4:1 128-MQFP

ISL54100CQZ

Manufacturer Part Number
ISL54100CQZ
Description
IC REGENERATOR TMDS 4:1 128-MQFP
Manufacturer
Intersil
Datasheet

Specifications of ISL54100CQZ

Applications
Multimedia Displays, Test Equipment
Interface
I²C
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-MQFP, 128-PQFP
Mounting Type
Surface Mount
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Pin Descriptions
RX0-_A, RX0+_A, RX1-_A, RX1+_A,
RX2-_A, RX2+_A
RX0-_B, RX0+_B, RX1-_B, RX1+_B,
RX2-_B, RX2+_B
RX0-_C, RX0+_C, RX1-_C, RX1+_C,
RX2-_C, RX2+_C
RX0-_D, RX0+_D, RX1-_D, RX1+_D,
RX2-_D, RX2+_D
RXC-_A, RXC+_A, RXC-_B, RXC+_B,
RXC-_C, RXC+_C, RXC-_D, RXC+_D
TX0-, TX0+, TX1-, TX1+, TX1-, TX1+
TXC-, TXC+
SCL
SDA
ADDR[6:0]
CH_SEL_0, CH_SEL_1
AUTO_CH_SEL
CHA_Active, CHB_Active,
CHC_Active, CHD_Active
RES_BIAS
RES_TERM
PD
RESET
TEST
V
V
GND
D
D
_ESD
SYMBOL
8
TMDS Inputs. Incoming TMDS data signals for Channel A.
TMDS Inputs. Incoming TMDS data signals for Channel B (ISL54100 and ISL54102 only).
TMDS Inputs. Incoming TMDS data signals for Channel C (ISL54100 only).
TMDS Inputs. Incoming TMDS data signals for Channel D (ISL54100 only).
TMDS Inputs. Incoming TMDS clock signals for Channels A, B, C and D (ISL54100), Channels A and B
(ISL54102), or Channel A (ISL54101).
TMDS Outputs. TMDS output data for selected channel.
Digital input, 5V tolerant, 500mV hysteresis. Serial data clock for 2-wire interface.
Note: Internal 65kΩ pull-up to V
Bidirectional Digital I/O, open drain, 5V tolerant. Serial data I/O for 2-wire interface.
Note: Internal 65kΩ pull-up to V
Digital inputs, 5V tolerant. 7-Bit address for serial interface.
Note: Internal 60kΩ pull-down to GND.
Digital I/Os, 3.3V. Channel select inputs (for stand-alone operation), selected channel outputs (for
software configured or auto channel select modes).
CH_SEL_1 should be left unconnected for the ISL54102.
CH_SEL_0 and CH_SEL_1 should both be left unconnected for the ISL54101.
Note: The state of these outputs becomes random when the chip is in the Power-down mode.
Digital Input. Pull high to have the mux automatically select the highest channel (A is highest, D is lowest)
with an active TMDS clock. Low is manual channel select.
Digital Outputs, 3.3V. Output goes high when there is an active TMDS clock on that channel's input. Used
for activity detect in a stand-alone configuration.
CHC_Active and CHD_Active are NC (do Not Connect) for the ISL54102.
CHB_Active, CHC_Active and CHD_Active are NC (do Not Connect) for the ISL54101.
Tie to GND through a 3.16k external resistor. Sets up internal bias currents.
Tie to VD through a 1.0k 1% external resistor. During calibration, the termination resistor closest in value
to RES_TERM/20 (= 50Ω) is selected.
Digital Input, 3.3V. PD = Power-down. Pull high to put the ISL5410x in a minimum power consumption
mode.
Note: To ensure proper operation, this pin must be held low during power-up. It may be taken high 100ms
after the power supplies have settled to 3.3V ±10%.
When exiting Power-down, a termination resistor Recalibration cycle must be run to re-trim the
termination resistors (see register 0x03[7]).
Note: Internal 60kΩ pull-down to GND.
Digital Input, 3.3V. Pull high then low to reset the mux. Tie to GND in final application.
Note: Internal 60k pull-down to GND.
Digital Input. Used for production testing only. Tie to GND in final application. This pin has an internal
pulldown to GND, so it is also acceptable to leave this pin floating.
Power supply. Connect to a 3.3V supply and bypass each pin to GND with 0.1µF.
Power supply for ESD protection diodes. Connect one of these pins (pin 74 or 95) to the 3.3V V
rail with a low V
connected to V
Ground return for V
TMDS Outputs. TMDS output clock for selected channel.
ISL54100, ISL54101, ISL54102
D
F
. Bypass each pin to GND with 0.1µF.
(0.4V or lower) Schottky diode, with the cathode connected to V
D
.
D
D
.
.
DESCRIPTION
D
_ESD and the anode
June 4, 2008
D
supply
FN6275.5

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