PI7C9X20303ULAZPE Pericom Semiconductor, PI7C9X20303ULAZPE Datasheet - Page 37

• Manufacturer Part Number: PI7C9X20303ULAZPE
• Description: IC PCIE PACKET SWITCH 132VQFN
• Manufacturer: Pericom Semiconductor
• Series: UltraLo™r

Specifications of PI7C9X20303ULAZPE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 132-VQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

7.2.21
7.2.22
7.2.23
7.2.24
7.2.25
August 2009 – Revision 1.1
Pericom Semiconductor
PREFETCHABLE MEMORY BASE ADDRESS UPPER 32-BITS REGISTER
– OFFSET 28h
PREFETCHABLE MEMORY LIMIT ADDRESS UPPER 32-BITS REGISTER
– OFFSET 2Ch
I/O BASE ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h
I/O LIMIT ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h
CAPABILITY POINTER REGISTER – OFFSET 34h
BIT
31:20
BIT
31:0
BIT
31:0
BIT
15:0
BIT
31:16
BIT
7:0
FUNCTION
Prefetchable Memory
Limit Address
[31:20]
FUNCTION
Prefetchable Memory
Base Address, Upper
32-bits [63:32]
FUNCTION
Prefetchable Memory
Limit Address,
Upper 32-bits
[63:32]
FUNCTION
I/O Base Address,
Upper 16-bits
[31:16]
FUNCTION
I/O Limit Address,
Upper 16-bits
[31:16]
FUNCTION
Capability Pointer
TYPE
TYPE
TYPE
TYPE
TYPE
TYPE
RW
RW
RW
RW
RW
RO
Page 37 of 77
DESCRIPTION
Defines the top address of an address range for the Bridge to determine when
to forward memory read and write transactions from one interface to the
other. The upper 12 bits correspond to address bits [31:20] and are writable.
The lower 20 bits are assumed to be FFFFFh. The memory limit upper 32 bits
register contains the upper half of the limit address.
Reset to 000h.
DESCRIPTION
Defines the upper 32-bits of a 64-bit bottom address of an address range for
the Bridge to determine when to forward memory read and write transactions
from one interface to the other.
Reset to 00000000h.
DESCRIPTION
Defines the upper 32-bits of a 64-bit top address of an address range for the
Bridge to determine when to forward memory read and write transactions
from one interface to the other.
Reset to 00000000h.
DESCRIPTION
Defines the upper 16-bits of a 32-bit bottom address of an address range for
the Bridge to determine when to forward I/O transactions from one interface
to the other.
Reset to 0000h.
DESCRIPTION
Defines the upper 16-bits of a 32-bit top address of an address range for the
Bridge to determine when to forward I/O transactions from one interface to
the other.
Reset to 0000h.
DESCRIPTION
Pointer points to the PCI power management registers (80h).
3Port-3Lane PCI Express® Switch
UltraLo
PI7C9X20303UL
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