A5350CA Allegro Microsystems Inc, A5350CA Datasheet - Page 7

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A5350CA

Manufacturer Part Number
A5350CA
Description
IC SMOKE DETECTOR ION 16-DIP
Manufacturer
Allegro Microsystems Inc
Type
Smoke Detectorr
Datasheet

Specifications of A5350CA

Input Type
Voltage
Output Type
Voltage
Interface
CMOS
Current - Supply
12µA
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
A5350
SENSITIVITY SET pin to a resistor divider connected between
the VDD and VSS pins.
Low Battery
The low battery condition threshold is set internally by a voltage
divider connected between VDD and VSS. The threshold can
be externally adjusted by connecting a resistor between the
LOW-V SET pin and either the VDD or VSS pins.
To increase the threshold, a resistor can be connected between
LOW-V SET and VSS. Given an initial threshold, V
nally 7.5 V), and a target threshold, V
have the value:
where
To decrease the threshold, a resistor can be connected between
LOW-V SET and VDD. Given an initial threshold, V
nally 7.5 V), and a target threshold, V
have the value:
where
The battery voltage level is checked approximately every 40 sec-
onds during the (approximately) 10 mA, 10 ms LED pulse. If an
LED is not used, it should be replaced with an equivalent resistor
R
R
LOWVSET
K = 1 / (V
LOWVSET
K = V
(th)set
= 600E3 × K / (1 – 0.375 × K) ,
= 960E3 × K / (0.6 – 1.6 × K) ,
(th)set
/ (0.727 × V
/ [0.727 × V
(th)set
(th)set
(th)init
(th)init
Ionization Smoke Detector with Interconnect
, the resistor should
, the resistor should
) – 1 .
] – 1) .
(th)init
(th)init
(nomi-
(nomi-
(typically 500 to 1000 Ω) such that the battery loading remains
about 10 mA.
I/O
A connection to the I/O pin allows multiple smoke detectors to
be interconnected. If any single unit detects smoke, its I/O pin is
driven high (after a nominal 3 s delay), and all connected units
will sound their associated horns. When the I/O pin is driven
high by another device, the oscillator immediately speeds up to
its 41.7 ms period. The remainder of the sped-up clock cycle,
and two additional consecutive clock cycles with I/O high are
required to cause an alarm. If the I/O pin falls below its threshold
at any time during those (approximately) 83.4 ms, an internal
latch is reset and there will not be an alarm. Thus, the I/O must
remain high for (approximately) 93.9 ms in order to cause an
alarm. This filtering provides significant immunity to I/O noise.
The LED is suppressed when an alarm is signaled from an
interconnected unit, and any local alarm condition causes the I/O
pin to be ignored as an input. This pin has an on-chip pulldown
device and must be left unconnected if not used.
Testing
On power-up, all internal counters are reset. Internal test cir-
cuitry allows low battery check by holding the FEEDBACK and
OSC CAP pins low during power-up, then reducing V
monitoring the HORN1 pin. HORN1 will be driven high when
V
can be accelerated by driving the OSC CAP pin with a 2 kHz
square wave. The 10 ms strobe period must be maintained for
proper operation of the comparator circuitry.
DD
falls below the low-battery threshold. All functional tests
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
DD
and
6

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