AD9845AJST Analog Devices Inc, AD9845AJST Datasheet - Page 12

• Manufacturer Part Number: AD9845AJST
• Description: IC CCD SIGNAL PROC 12BIT 48-LQFP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9845AJST

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

AD9845A
HD
VD
PxGA GAIN
HD
VD
PxGA GAIN
NOTE: 0 = GAIN0, 1 = GAIN1, 2 = GAIN2, 3 = GAIN3
NOTE: 0 = GAIN0, 1 = GAIN1, 2 = GAIN2
SHP
SHP
VD
HD
HD
VD
0101...
LINE 0
0101...
NOTES:
1. MINIMUM PULSEWIDTH FOR HD AND VD IS 5 PIXEL CYCLES.
2. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES. MINIMUM SET-UP TIME IS 3ns.
3. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING EDGE WILL RESET TO 0101.
4. EVERY HD RISING EDGE WITHOUT A PREVIOUS VD RISING EDGE WILL ALTERNATE BETWEEN 0101... AND 1212.
NOTES:
1. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES.
2. EVERY HD RISING EDGE WITH A PREVIOUS VD FALLING EDGE WILL RESET TO 0101.
3. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING EDGE WILL RESET TO 2323.
4. EVERY HD RISING EDGE WITHOUT A PREVIOUS VD RISING EDGE WILL REPEAT EITHER 0101... (EVEN) OR 2323 ... (ODD).
LINE 0
3ns MIN
0101...
LINE 1
1212...
LINE 1
EVEN FIELD
5 PIXEL MIN
FRAME n
5 PIXEL MIN
0101...
LINE 2
0101...
LINE 2
LINE m–1
LINE m–1
3ns MIN
GAINX
LINE m
LINE m
GAINX
3ns MIN
GAIN0
2323...
LINE 0
3ns MIN
0101...
GAIN0
LINE 0
GAIN1
GAIN1
GAIN0
2323...
LINE 1
1212...
ODD FIELD
LINE 1
GAIN0
GAINX
FRAME n+1
2323...
LINE 2
0101...
LINE 2
GAINX
GAIN2
LINE m–1
LINE m–1
GAIN1
GAIN3
GAIN2
LINE m
LINE m