AD9840AJST Analog Devices Inc, AD9840AJST Datasheet - Page 3

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AD9840AJST

Manufacturer Part Number
AD9840AJST
Description
IC CCD SIGNAL PROC 10BIT 48-LQFP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 10-Bitr
Datasheet

Specifications of AD9840AJST

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Mounting Type
Surface Mount
Package / Case
48-LQFP
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Sample Rate
40MSPS
Input Voltage Range
0.8V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Resolution
10b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Number Of Channels
1
Current - Supply
-
Lead Free Status / RoHS Status
Compliant

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CCD-MODE SPECIFICATIONS
Parameter
P
MAXIMUM CLOCK RATE
CDS
Max Input Range before Saturation
Max Output Range
VARIABLE GAIN AMPLIFIER (VGA)
BLACK LEVEL CLAMP
SYSTEM PERFORMANCE
POWER-UP RECOVERY TIME
NOTES
1
Specifications subject to change without notice.
TRANSIENT
Input Signal Characteristics defined as follows, with 4 dB CDS gain:
500mV TYP
OWER CONSUMPTION
Allowable CCD Reset Transient
Max CCD Black Pixel Amplitude
Max Input Range before Saturation
Max Input Range before Saturation
Gain Resolution
Gain Range (Two’s Complement Coding)
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range
Clamp Level Resolution
Clamp Level
Gain Accuracy, VGA Code 91 to 1023
Peak Nonlinearity, 500 mV Input Signal
Total Output Noise
Power Supply Rejection (PSR)
From Fast Recovery Mode
From Reference Standby Mode
From Total Shutdown Mode
From Power-Off Condition
RESET
Min Gain (CDS Gain Register Code 32)
Medium Gain (CDS Gain Code 63)
Max Gain (CDS Gain Code 31)
Low Gain (VGA Register Code 91)
Max Gain (VGA Code 1023)
Min Clamp Level
Max Clamp Level
BLACK PIXEL
200mV MAX
OPTICAL
SIGNAL RANGE
1V MAX
INPUT
1
1
1
(T
Min
20
1.0
1.6
1.6
2.0
–1.0
MIN
to T
MAX
Guaranteed
, AVDD = DVDD = 3.0 V, f
Typ
155
500
200
1.5
0.5
64
–2
4
10
1024
2
36
256
0
63.75
0.4
0.25
40
0.1
1
3
15
Max
+1.0
Unit
mW
MHz
mV
mV
V p-p
V p-p
V p-p
V p-p
Steps
dB
dB
dB
V p-p
V p-p
Steps
dB
dB
Steps
LSB
LSB
dB
%
LSB rms AC Grounded Input, 6 dB Gain Applied
dB
ms
ms
ms
ms
DATACLK
= f
SHP
Notes
See Input Waveform in Note 1
With 4 dB CDS Gain
With –2 dB CDS Gain
With 10 dB CDS Gain
At Any CDS Gain Setting
See Figure 15 for CDS Gain Curve
4 dB is Default with CDS Gain Disabled
See Figure 13 for VGA Gain Curve
See Page 12 for Gain Equations
Measured at ADC Output
Specifications Include Entire Signal Chain
Use Equations on Page 12 to Calculate Gain
12 dB Gain Applied (4 dB CDS Gain)
Measured with Step Change on Supply
Clocks Must Be Applied, as in Figures 8 and 9
= f
SHD
= 40 MHz, unless otherwise noted.)
AD9840A

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