AD9821KST Analog Devices Inc, AD9821KST Datasheet - Page 4

• Manufacturer Part Number: AD9821KST
• Description: IC IMAGE SGNL PROC 12BIT 48-LQFP
• Manufacturer: Analog Devices Inc
• Type: Image Sensorr

Specifications of AD9821KST

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 40MSPS
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

ABSOLUTE MAXIMUM RATINGS
Parameter
AVDD1, AVDD2
DVDD1, DVDD2
DRVDD
Digital Outputs
DATACLK
CLPOB, PBLK
SCK, SL, SDATA
VRT, VRB
BYP1, VIN
Junction Temperature
Lead Temperature
AD9821
TIMING SPECIFICATIONS
Parameter
SAMPLE CLOCKS
DATA OUTPUTS
SERIAL INTERFACE
*Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp performance.
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD9821 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
(10 sec)
DATACLK Clock Period
DATACLK Hi/Low Pulsewidth
CLPOB Pulsewidth*
Internal Clock Delay
Output Delay
Output Hold Time
Pipeline Delay
Maximum SCK Frequency
SL to SCK Setup Time
SCK to SL Hold Time
SDATA Valid to SCK Rising Edge Setup
SCK Falling Edge to SDATA Valid Hold
SCK Falling Edge to SDATA Valid Read
With
Respect
To
AVSS
DVSS
DRVSS
DRVSS
DVSS
DVSS
DVSS
AVSS
AVSS
Min
–0.3 +3.9
–0.3 DRVDD + 0.3
–0.3 DVDD + 0.3
–0.3 DVDD + 0.3
–0.3 DVDD + 0.3
–0.3 AVDD + 0.3
–0.3 AVDD + 0.3
–0.3 +3.9
–0.3 +3.9
(C
L
Max
150
300
= 20 pF, f
SAMP
= 40 MHz, Imager-Mode Timing in Figures 5 and 6, Serial Timing in Figures 7–9)
Unit
V
V
V
V
V
V
V
V
V
°C
°C
Symbol
t
t
t
t
t
t
f
t
t
t
t
t
CONV
ADC
COB
ID
OD
H
SCLK
LS
LH
DS
DH
DV
–4–
Model
AD9821KST
THERMAL CHARACTERISTICS
Thermal Resistance
48-Lead LQFP Package
θ
JA
= 56°C/W
Min
25
11
2
7.0
10
10
10
10
10
10
Temperature
Range
–20°C to +85°C
ORDERING GUIDE
Typ
25
12.5
20
3.0
13
7.6
9
Max
16
Package
Description
Thin Plastic
Quad Flatpack
(LQFP)
Package
Option
ST-48
Unit
ns
ns
Pixels
ns
ns
ns
Cycles
MHz
ns
ns
ns
ns
ns
REV. 0