QT60486-AS Atmel, QT60486-AS Datasheet - Page 8

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QT60486-AS

Manufacturer Part Number
QT60486-AS
Description
SENSOR IC MTRX TOUCH48KEY 44TQFP
Manufacturer
Atmel
Series
QMatrix™, QProx™r
Type
Capacitiver
Datasheet

Specifications of QT60486-AS

Rohs Status
RoHS non-compliant
Number Of Inputs/keys
48 Key
Resolution (bits)
9, 11 b
Data Interface
Serial, SPI™, UART
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
25mA
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Output Type
*
Interface
*
Input Type
*
For Use With
427-1088 - BOARD EVAL QT60486-AS QMATRIX

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
QT60486-ASG
Manufacturer:
LT
Quantity:
2 488
4 Control Commands
Refer to Section 5.1, page 11 for further details.
The devices feature a set of commands which are used for
control and status reporting. The host device has to send the
command to the QT60xx6 and await a response.
SPI mode: While waiting the host should delay for 100 µs
from the end of the command, then start to check if DRDY is
or goes high. If it is high, then the host master can clock out
the resulting byte(s).
UART mode: After the command is sent, the QT will send
back the response usually starting within 100µs. The host can
clamp DRDY low (wire-AND logic) to inhibit a response if the
host is not able to receive the transmission.
4.1 Null Command - 0x00
Used primarily to shift back data from the QT in SPI mode.
Since the host device is always the master in SPI mode, and
data is clocked in both directions, the Null command is
required frequently to act as a placeholder where the desire is
to only get data back from the QT, not to send it.
In SPI communications, when the QT60xx6 responds to a
command with one or more response bytes, the host can
issue a new command instead of a null on the last byte shift
operation.
New commands during intermediate byte shift-out operations
are ignored, and null bytes should always be used.
4.2 Enter Setups Mode - 0x01
This command is used to initiate the Setups block transfer
from Host to QT.
The command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command. After the 2nd 0x01 from
the host, the QT will reply with the character 0xFE. In SPI
mode this character must be shifted out by sending a null
(0x00) from the host. This command suspends normal
sensing starting from the first 0x01. A failure of the command
will cause a timeout.
Each byte in the block must arrive at the QT no later than
100ms after the previous one or a timeout will occur.
Any timeout will cause the device to cancel the block load and
go back to normal operation.
If no response comes back, the command was not received
and the device should preferably be reset from the host by
hardware reset just in case there are any other problems.
If 0xFE is received by the host, then the host should begin to
transmit the block of Setups to the QT. DRDY handshakes the
data. The delay between bytes can be as short as 10us but
the host can make it longer than this if required, but no more
than 100ms. The last two bytes the host should send is the
CRC for the block of data only.
After the block transfer the QT will check the CRC and
respond with 0x00 if there was an error. Regardless, it will
program the internal eeprom. If the CRC was correct it will
reply with a second 0xFE after the eeprom was programmed.
If there was an error in the block transfer the device will
restore the last known good Setups from Flash memory the
next time the device is reset. However until that point, the
lQ
Advanced information; subject to change
8
device will attempt to operate using the new Setups block
even if it is corrupt.
At the end of the full block load sequence, the device restarts
sensing without recalibration.
4.3 Cal All - 0x03
This command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command.
After the 2nd 0x03 from the host, the QT will reply with the
character 0xFC. Shortly thereafter the device will recalibrate
all keys and restart operation.
If no 0xFC comes back, the command was not properly
received and the device should preferably be reset.
The host can monitor the progress of the recalibration by
checking the status byte, using command 0x05.
4.4 Force Reset - 0x04
The command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command. After the 2nd 0x04, the QT
will reply with the character 0xFB just prior to executing the
reset operation.
The host can monitor the progress of the reset by checking
the status byte for recalibration, using command 0x05.
4.5 Error Status - 0x05
This command returns the general error status code.
Bit 5: Set if there is a FMEA failure detected
Bit 6: Set of there is a communications failure. This can be
reset by sending command 0x0f (last command command).
A CRC byte is appended to the response; this CRC folds in
the command 0x05 itself initially.
4.6 Report 1st Key - 0x06
Reports the first or only key to be touched, plus indicates if
there are yet other keys that are also touched.
The return bits are as follows:
Bits 0..5 encode for the first detected key in range 0..47.
If 2 or more keys in detection, bit 7 is set and the host should
interrogate the part via the 0x07 command to read out all the
key detections. This one command should be the dominant
interrogation command in the host interface; further
commands can be issued if the response to 0x06 warrants it.
A CRC byte is appended to the response; this CRC folds in
the command 0x06 itself initially.
BIT
7
6
5
4
3
2
1
0
Description
1= more than 1 key is active
1= any error condition is present
Key bit 5
Key bit 4
Key bit 3
Key bit 2
Key bit 1
Key bit 0
QT60486-AS 0.07/1103

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