HIP9011ABZ Intersil, HIP9011ABZ Datasheet - Page 4

• Manufacturer Part Number: HIP9011ABZ
• Description: IC SENSOR ENGINE KNOCK 20-SOIC
• Manufacturer: Intersil
• Type: Engine Knock Signal Processorr

Specifications of HIP9011ABZ

• Input Type: Logic
• Output Type: Logic
• Interface: SPI
• Current - Supply: 8mA
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Specifications
NOTES:
CH0 and CH1 High Output Voltage
CH0 and CH1 Low Output Voltage
Voltage Gain
ANTIALIASING FILTER
Response 1kHz to 20kHz, Referenced to 1kHz
Attenuation at 180kHz, Referenced
to 1kHz
PROGRAMMABLE FILTERS
Peak to Peak Voltage Output
Filters Q (Note 2)
PROGRAMMABLE GAIN AMPLIFIERS
Percent Amplifier Gain Deviation
INTEGRATOR
Integrator Reset Voltage
Integrator Droop after 500µs
DIFFERENTIAL CONVERTER
Differential to Single Ended Converter Offset
Voltage
Change In Converter Output
SYSTEM GAIN DEVIATION
Gain Deviation from “Ideal Equation” Correlation
Factor + 5.0% (Note 3)
2. Q = fo/BW, where: fo = Center Frequency, BW = 3dB Bandwidth
3. Ideal Equation: INTOUT (Volts) = [V
INPUT AMPLIFIERS
Where: V
V
RESET
G
G
0.318 = 1/
G
DSE
BPF
G
t
R
INT
PR
R
f
t
IN
IN
IN
N = Number of Cycles of Input Signal
Q
C
F
= input signal amplitude (V
= External Input Gain; GIN = R
= Programmed Gain
= Gain of Bandpass Filter (2 for Ideal Case at Center)
= Integration Time; t
= Frequency of Input Signal
= Feedback Resistor Value
= Signal Input Resistor Value
= Programmed Time Constant
= Gain of DSE Converter (2 for Ideal Case)
= Integrator Reset Voltage = 0.125V, Typ
PARAMETER
π
4
V
Unless Otherwise Specified (Continued)
INT
DD
= 5V ±5%, GND = 0V, Clock Frequency 4MHz ±0.1%, T
IN
= N/f
* G
P-P
Q
IN
)
F
/R
* G
IN
PR
SYMBOL
V
V
DIFOUT
V
V
V
DIFV
ATTEN
V
* G
OUT
V
DROOP
OUT
RESET
RESET
A
OUT
BW
%G
OUT
Q
CL
BPF
LO
IO
HI
-
* 1/π * (N/t
HIP9011
I
I
Input R = 47.5K, Feedback
R = 475kΩ
Test Mode
Test Mode
Run Mode
Run Mode
Run Mode
Pin 4 Voltage at Start of
Integration
Cycle; V
Hold Mode, Pin 7 = 0V,
V
Pin 4 set to 20% to 80% of V
By Design
Run Mode, 500µA Sinking Load
to No Load Condition
Run Mode, maximum signal
output from Input Amplifier
<2.25V
0.95 + Device Reset Voltage;
For Total V
SINK
SOURCE
DD
= 5.0V
C
TEST CONDITIONS
= 100µA, V
(ms)
P-P
DD
= 100µA; V
, Equation Output X
OUT ≤
= 5.0V
*
f
Q
(kHz)) * G
DD
4.7V
= 5.0V
DD
= 5.0V
DSE
A
= -40
DD
] + V
o
±100mV
C to 125
RESET
-8%,
MIN
+18
4.7
-10
3.5
75
-
-
-
-
-
-
-
o
V
Equatio
C,
X 0.95
RESET
TYP
+20
-0.5
125
4.9
-15
4.0
2.5
0.1
15
±1
±3
±1
n
-
±100mV
MAX
200
+21
175
±50
±10
8%,
-
-
-
-
-
-
-
January 6, 2006
UNITS
V
mV
mV
mV
mV
mV
dB
dB
dB
P-P
Q
%
FN4367.2
V
V