SI3050-E-FM Silicon Laboratories Inc, SI3050-E-FM Datasheet - Page 40

• Manufacturer Part Number: SI3050-E-FM
• Description: IC VOICE DAA GCI/PCM/SPI 24-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: -r

Specifications of SI3050-E-FM

• Function: Data Access Arrangement (DAA)
• Interface: GCI, PCM, SPI
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 8.5mA
• Power (watts): *
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-WFQFN Exposed Pad
• Includes: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si3050 + Si3011/18/19
5.32. PCM Highway
The Si3050 contains a flexible programmable interface for the transmission and reception of digital PCM samples.
PCM data transfer is controlled via the PCLK and FSYNC inputs, the PCM Transmit and Receive Start Count
registers (Registers 34–37), and the PCM Mode Select register (Register 33). The interface can be configured to
support from 4 to 128 8-bit timeslots in each frame, which corresponds to PCLK frequencies of 256 kHz to
8.192 MHz in power of 2 increments. Time slot assignment and data delay from FSYNC edge are handled via the
TXS and RXS registers. These 10-bit values are programmed with the number of PCLK cycles following the rising
edge of FSYNC until the data transfer begins. Because the Si3050 looks for the rising edge of FSYNC, both long
and short FSYNC pulse widths can be accommodated. A value of 0 in the PCM Transmit and Receive Start Count
registers signifies that the MSB of the data should occur in the same cycle as the rising edge of FSYNC.
40
Note: This table denotes pin functionality after the rising edge of RESET and mode selection.
SDI_THRU
Pin Name
FSYNC
SCLK
PCLK
SDO
DRX
DTX
SDI
CS
Table 21. Pin Functionality in PCM or GCI Highway Mode
Note: Values shown are the states of the pins at the rising edge of
SPI Data Throughput pin for Daisy Chaining
SCLK
Table 20. PCM or GCI Highway Mode Selection
Operation (Connects to the SDI pin of the
subsequent device in the daisy chain)
1
0
0
RESET.
PCM Frame Sync Input
SPI Serial Data Output
SPI Serial Data Input
PCM Data Transmit
PCM Data Receive
PCM Input Clock
SPI Clock Input
SPI Chip Select
SDI
X
PCM Mode
0
1
Rev. 1.4
B2 Channel used
B1 Channel used
Mode Selected
PCM Mode
GCI Mode,
GCI Mode,
PCM/GCI Mode Selector
B1/B2 Channel Selector
GCI Frame Sync Input
GCI Data Transmit
GCI Data Receive
GCI Input Clock
Selector, bit 2
Selector, bit 1
Selector, bit 0
GCI Mode
Sub-frame
Sub-frame
Sub-frame