C200HW-CE011 Omron, C200HW-CE011 Datasheet - Page 103
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C200HW-CE011
Manufacturer Part Number
C200HW-CE011
Description
PC CARD MODULE CPU BUS SNGLE
Manufacturer
Omron
Datasheet
1.C1000H-COV01.pdf
(153 pages)
Specifications of C200HW-CE011
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
C200HWCE011
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100
PROGRAMMING INSTRUCTIONS
BASIC INSTRUCTIONS (CONTINUED)
NAME MNEMONIC
COUNTER
CNT
REVERSIBLE COUNTER
CNTR (12)
TIMER
TIM
TOTALIZING TIMER
TTIM(87)
HIGH- SPEED TIMER
TIMH(15)
END
END(01)
INTERLOCK
IL(02)
INTERLOCK CLEAR
ILC(03)
JUMP
JMP(04)
JUMP END
JME(05)
KEEP
KEEP(11)
NO OPERATION
NOP(00)
DIFFERENTIATE UP
DIFU(13)
DIFFERENTIATE DOWN
DIFD(14)
An instruction marked with “@” can be used as a differentiated instruction that will be executed only once each time the instruction
executing condition is turned ON.
An instruction marked with “
An instruction marked with “
” is an expansion instruction. These instructions must be assigned function codes before they can be used.
” is an expansion instruction. The assigned function code is the default for the C200HX/HG/HE PLC.
SYMBOL
II
DI
R
CP
R
R
S
JME(05)
JMP(04)
DIFU(13) B
DIFD(14) B
None
CNTR(12)
TIMH(15) N
END(01)
TTIM(87)
KEEP(11)
IL(02)
ILC(03)
CNT N
SV
TIM N
N
RB
SV
N
SV
SV
SV
N
N
B
FUNCTION
A decrementing counter. SV: 0 to 9999; CP: count
pulse; R: reset input. The TC bit is entered as a con-
stant.
Increases or decreases the PV by one whenever the in-
crement input (II) or decrement input (DI) signals, re-
spectively, go from OFF to ON. SV: 0 to 9999; R: reset
input.
ON-delay (decrementing) timer operation. Set value:
000.0 to 999.9 s.
Creates a totalizing timer.
A high-speed, ON-delay (decrementing) timer. SV:
00.02 to 99.99 s. The TC bit is entered as a constant.
Required at the end of each program. Instructions lo-
cated after END(01) will not be executed.
Creates interlocks used to control execution of program
sections. The entire section is reset when execution is
completed.
JUMP transfer program execution to the JUMP END
with the same number.
Defines a bit (B) as a latch, controlled by the set (S) and
reset (R) inputs.
Nothing is executed and program operation moves to
the next instruction.
DIFU(13) turns ON the designated bit (B) for one cycle
on reception of the leading (rising) edge of the input sig-
nal.
DIFD(14) turns ON the bit for one cycle on reception of
the trailing (falling) edge.