JLC1562BNG ON Semiconductor, JLC1562BNG Datasheet - Page 6

• Manufacturer Part Number: JLC1562BNG
• Description: IC I/O EXPANDER I2C 8B 16DIP
• Manufacturer: ON Semiconductor

Specifications of JLC1562BNG

• Interface: I²C
• Number Of I /o: 8
• Interrupt Output: No
• Frequency - Clock: 100KHz
• Voltage - Supply: 4.2 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Includes: DAC, POR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

READ WRITE DATA FORMAT
<<READ MODE>>
<<WRITE MODE>>
S
S
Slave Address
Read Data
Slave Address
Write Data (1)
Write Data (2)
0
0
1
1
Slave Address
Slave Address
1
1
1
1
A2
A2
A0 − A2
A3 − A6
R/W
D5 − D7
D0 − D4
A0 − A2
A3 − A6
R/W
D0 − D7
D7
D6
D0 − D5
A1
A1
A0
A0
1
0
ACK
ACK
D7
D7
I/O Expander Device Address (Pins A0 − A2)
1 : READ ADDRESS
Output of Comparator “A”. (V
Output of Comparator “B”. (V
READ LATCH Bit Controls when Data Will Be Latched.
I/O Expander Device Address (Pins A0 − A2)
0 : WRITE ADDRESS
Device Pins P0 to P7 Output Bits.
READ LATCH CONTROL
0 : Data is latched at the ACK after a READ COMMAND.
1 : Data is latched when Comparator “B” switches from 0 to 1.
1 :
COMPARATOR “B” V
DAC Input Bits
A6
A6
D6
D6
Data is reset at the ACK after a READ COMMAND.
http://onsemi.com
A5
A5
Write Data (1)
D5
D5
Read Data
JLC1562B
A4
A4
D4 D3
D4 D3
0 : V
1 : V ref + V
A3
A3
6
(switch point is controlled by V
ref
is hard wired as
is hard wired as
D2
D2
+ 40
ref
80
D1
D1
DAC
Control Bit
V
D0
D0
DD
th
th
ACK
ACK
Latch Control of Signals C0 − C4
in the Device BLOCK DIAGRAM
= 1/2 V
= 1/2 V
D7
P
0
0
DD
DD
D6
1
1
)
OR V
Write Data (2)
D5
1
1
th
DAC
.)
D4 D3
1
1
)
D2
D1
D0
ACK
P