SX1506I091TRT Semtech, SX1506I091TRT Datasheet - Page 15

• Manufacturer Part Number: SX1506I091TRT
• Description: IC GPIO EXP I2C 16CH 28UTQFN
• Manufacturer: Semtech

Specifications of SX1506I091TRT

• Interface: I²C
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-UTQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SX1506I091TR

ADVANCED COMMUNICATIONS & SENSING
Please note that SX1506 implements register address auto-increment i.e. after the Data ACK from Slave the
master can write further bytes and the interface will handle the register address increment automatically. Finally
the master terminates the transfer normally the stop condition [P].
4.5.2
After the start condition [S], the slave address is sent, followed by an eighth bit indicating a write. The I
acknowledges that it is being addressed, and the master responds with an 8 bit data byte consisting of the
register address. The slave acknowledges and the master sends the repeated start condition [Sr]. Once again,
the slave address is sent, followed by an eighth bit indicating a read. The slave responds with an acknowledge
and the previously addressed 8 bit data byte; the master then sends a non-acknowledge (NACK). Finally, the
master terminates the transfer with the stop condition [P].
S: Start Condition
W: Write = ‘0’
R: Read = ‘1’
A: Acknowledge (sent by slave)
NACK: Non-Acknowledge (sent by master)
Sr: Repeated Start Condition
P: Stop condition
Please note that SX1506 implements register address auto-increment i.e. after the Data byte from Slave the
master can acknowledge (ACK) to indicate that it wants to read the next byte and the interface will handle the
register address increment automatically. Finally the master terminates the transfer normally with a NACK
followed by the stop condition [P].
4.5.3
When operating SX1504 or SX1505, stop-separated reads can also be used. This format allows a master to set
up the register address pointer for a read and return to that slave at a later time to read the data. In this format
the slave address followed by a write command are sent after a start [S] condition. The slave then acknowledges
it is being addressed, and the master responds with the 8-bit register address. The master sends a Stop or
Restart condition and may then address another slave. After performing other tasks, the master can send a start
or restart condition to the slave with a read command. The slave acknowledges this request and returns the data
from the register location that had previously been set up.
Rev 2 – 30
Master operations
SX1504, SX1505 or SX1506 operations (Slave)
READ - STOP separated format (SX1504 and SX1505 only)
READ
th
August 2010
Figure 10 - 2-Wire Serial Interface, Read Register Operation
Figure 9 – Write RegData Register
Slave Address: 7 bit
Register Address: 8 bit
Data: 8 bit
15
SX1504/SX1505/SX1506
4/8/16 Channel GPIO
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