ADSP-2115KP-80 Analog Devices Inc, ADSP-2115KP-80 Datasheet - Page 16
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ADSP-2115KP-80
Manufacturer Part Number
ADSP-2115KP-80
Description
Manufacturer
Analog Devices Inc
Datasheet
1.ADSP-2115KP-80.pdf
(64 pages)
Specifications of ADSP-2115KP-80
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
20MHz
Mips
20
Device Input Clock Speed
20MHz
Ram Size
1.5KB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-2115KP-80
Manufacturer:
AD
Quantity:
5 510
ADSP-21xx
Program Flow Instructions
DO <addr> [UNTIL term] ;
[IF cond] JUMP (Ix) ;
[IF cond] JUMP <addr>;
[IF cond] CALL (Ix) ;
[IF cond] CALL <addr>;
IF [NOT ] FLAG_IN
IF [NOT ] FLAG_IN
[IF cond] SET|RESET|TOGGLE
[IF cond] RTS ;
[IF cond] RTI ;
IDLE [(n)] ;
Miscellaneous Instructions
NOP ;
MODIFY (Ix , My);
[PUSH STS] [, POP CNTR] [, POP PC] [, POP LOOP] ;
ENA|DIS
Notation Conventions
Ix
My
<data>
<addr>
<exp>
<ALU>
<MAC>
<SHIFT>
cond
term
dreg
reg
;
,
[
[, ...]
option1 | option2
Assembly Code Example
The following example is a code fragment that performs the filter tap update for an adaptive filter based on a least-mean-squared
algorithm. Notice that the computations in the instructions are written like algebraic equations.
adapt:
]
MF=MX0 * MY1 ( RND), MX0=DM(I2,M1);
MR=MX0 * MF ( RND), AY0=PM(I6,M5);
DO adapt UNTIL CE;
MODIFY(I2,M3);
MODIFY(I6,M7);
SEC_REG [, ...] ;
BIT_REV
AV_LATCH
AR_SAT
M_MODE
TIMER
G_MODE
PM(I6,M6)= A R, MR=MX0 * MF ( RND);
AR=MR1+AY0, MX0=DM(I2,M1), AY0=PM(I6,M7);
Index registers for indirect addressing
Modify registers for indirect addressing
Immediate data value
Immediate address value
Exponent (shift value) in shift immediate instructions (8-bit signed number)
Any ALU instruction (except divide)
Any multiply-accumulate instruction
Any shift instruction (except shift immediate)
Condition code for conditional instruction
Termination code for DO UNTIL loop
Data register (of ALU, MAC, or Shifter)
Any register (including dregs)
A semicolon terminates the instruction
Commas separate multiple operations of a single instruction
Optional part of instruction
Optional, multiple operations of an instruction
List of options; choose one.
JUMP <addr>;
CALL <addr>;
FLAG_OUT [, ...] ;
Do Until Loop
Jump
Call Subroutine
Jump/Call on Flag In Pin
Modify Flag Out Pin
Return from Subroutine
Return from Interrupt Service Routine
Idle
No Operation
Modify Address Register
Stack Control
Mode Control
–16–
{MF=error * b eta}
{Point to oldest data}
{Point to start of data}
REV. B