ADV7181BST Analog Devices Inc, ADV7181BST Datasheet - Page 30

IC VIDEO DECODER SDTV 64-LQFP

ADV7181BST

Manufacturer Part Number
ADV7181BST
Description
IC VIDEO DECODER SDTV 64-LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7181BST

Rohs Status
RoHS non-compliant
Applications
Recorders, Set-Top Boxes
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Adc/dac Resolution
9b
Screening Level
Industrial
Package Type
LQFP
Pin Count
64
For Use With
EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7181BST
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADV7181B
Table 32. AGC Modes
Input Video Type
Any
CVBS
Y/C
YPrPb
Luma Gain
LAGC[2:0] Luma Automatic Gain Control,
Address 0x2C[7:0]
The luma automatic gain control mode bits select the mode of
operation for the gain control in the luma path.
There are ADI internal parameters to customize the peak white
gain control. Contact ADI sales for more information.
Table 33. LAGC Function
LAGC[2:0]
000
001
010 (default)
011
100
101
110
111
LAGT[1:0] Luma Automatic Gain Timing,
Address 0x2F[7:6]
The luma automatic gain timing register allows the user to
influence the tracking speed of the luminance automatic gain
control. This register only has an effect if the LAGC[2:0]
register is set to 001, 010, 011, or 100 (automatic gain control
modes).
If peak white AGC is enabled and active (see the
STATUS_1[7:0] Address 0x10[7:0] section), the actual gain
update speed is dictated by the peak white AGC loop and, as a
result, the LAGT settings have no effect. As soon as the part
leaves peak white AGC, LAGT becomes relevant again.
The update speed for the peak white algorithm can be
customized by the use of internal parameters. Contact ADI
sales for more information.
Description
Manual fixed gain (use LMG[11:0])
AGC (blank level to sync tip); peak white
algorithm off
AGC (blank level to sync tip); peak white
algorithm on
Reserved
Reserved
Reserved
Reserved
Freeze gain
Luma Gain
Manual gain luma
Dependent on horizontal sync depth
Peak white
Dependent on horizontal sync depth
Peak white
Dependent on horizontal sync depth
Rev. B | Page 30 of 100
Table 34. LAGT Function
LAGT[1:0]
00
01
10
11 (default)
LG[11:0] Luma Gain, Address 0x2F[3:0];
Address 0x30[7:0]; LMG[11:0] Luma Manual Gain,
Address 0x2F[3:0]; Address 0x30[7:0]
Luma gain[11:0] is a dual-function register. If written to, a
desired manual luma gain can be programmed. This gain
becomes active if the LAGC[2:0] mode is switched to manual
fixed gain. Equation 1 shows how to calculate a desired gain.
If read back, this register returns the current gain value.
Depending on the setting in the LAGC[2:0] bits, one of these
gain values is returned:
Table 35. LG/LMG Function
LG[11:0]/LMG[11:0]
LMG[11:0] = X
LG[11:0]
Luma manual gain value (LAGC[2:0] set to luma manual
gain mode)
Luma automatic gain value (LAGC[2:0] set to any of the
automatic modes)
Luma
Chroma Gain
Manual gain chroma
Dependent on color burst amplitude;
taken from luma path
Dependent on color burst amplitude;
taken from luma path
Dependent on color burst amplitude;
taken from luma path
Dependent on color burst amplitude;
taken from luma path
Taken from luma path
_
Gain
=
(
0
Read/Write
Write
Read
<
Slow (TC = 2 sec)
Medium (TC = 1 sec)
Fast (TC = 0.2 sec)
Adaptive
Description
LG
2048
4095
)
=
Description
Manual gain for luma
path
Actually used gain
0
...
2
(1)

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