ADV7171KS-REEL Analog Devices Inc, ADV7171KS-REEL Datasheet - Page 23
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ADV7171KS-REEL
Manufacturer Part Number
ADV7171KS-REEL
Description
IC DAC VIDEO ENC NTSC 44-MQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet
1.ADV7171KSUZ.pdf
(64 pages)
Specifications of ADV7171KS-REEL
Rohs Status
RoHS non-compliant
Applications
Set-Top Boxes, Video Players
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Adc/dac Resolution
10b
Screening Level
Industrial
Package Type
MQFP
Pin Count
44
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Not Compliant
Mode 1: Master Option HSYNC, BLANK, FIELD
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode the ADV7170/ADV7171 can generate horizontal SYNC and odd/even FIELD signals. A transition of the FIELD input when
HSYNC is low indicates a new frame, that is, vertical retrace. The BLANK signal is optional. When the BLANK input is disabled, the
ADV7170/ADV7171 automatically blank all normally blank lines as per CCIR-624. Pixel data is latched on the rising clock edge following
the timing signal transitions. Mode 1 is shown in
FIELD for an odd or even field transition relative to the pixel data.
Mode 2: Slave Option HSYNC, VSYNC, BLANK
(Timing Register 0 TR0 = X X X X X 1 0 0)
In this mode the ADV7170/ADV7171 accept horizontal and vertical SYNC signals. A coincident low transition of both HSYNC and
VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an even field. The
BLANK signal is optional. When the BLANK input is disabled, the ADV7170/ADV7171 automatically blank all normally blank lines as
per CCIR-624. Mode 2 is illustrated in
HSYNC
BLANK
VSYNC
HSYNC
BLANK
VSYNC
522
DISPLAY
260
DISPLAY
523
261
HSYNC
BLANK
FIELD
PIXEL
DATA
524
262
525
263
NTSC = 16 × CLOCK/2
PAL = 12 × CLOCK/2
1
Figure 27
264
Figure 26. Timing Mode 1 Odd/Even Field Transitions Master/Slave
EVEN FIELD
ODD FIELD
2
265
(NTSC) and
Figure 24
3
266
Figure 27. Timing Mode 2 (NTSC)
4
267
(NTSC) and
Rev. C | Page 23 of 64
Figure 28
5
268
VERTICAL BLANK
VERTICAL BLANK
6
269
(PAL).
EVEN FIELD
Figure 25
ODD FIELD
7
270
8
(PAL).
271
9
NTSC = 122 × CLOCK/2
PAL = 132 × CLOCK/2
Figure 26
272
10
273
Cb
illustrates the
11
274
Y
Cr
ADV7170/ADV7171
Y
20
HSYNC, BLANK, and
283
21
DISPLAY
284
22
DISPLAY
285