AD725AR Analog Devices Inc, AD725AR Datasheet - Page 10
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AD725AR
Manufacturer Part Number
AD725AR
Description
IC ENCODER RGB TO NTSC 16-SOIC
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet
1.AD725ARZ.pdf
(20 pages)
Specifications of AD725AR
Rohs Status
RoHS non-compliant
Applications
RGB To NTSC/PAL
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Voltage - Supply, Analog
-
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD725AR
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD725AR-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD725AR-REEL7
Manufacturer:
SUN
Quantity:
1
Part Number:
AD725ARZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD725ARZ-RL
Manufacturer:
NS
Quantity:
4 500
AD725
Symbol
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NOTES
1
2
Input clock = 14.318180 MHz, STND pin = logic high.
Input cock = 17.734475 MHz, STND pin = logic low.
SW
SB
SM
MW
SR
RW
SD
DW
SS
BY
SC
BC
Name
Sync Width
Sync to Blanking
End
Sync to Modulator
Restore
Modulator Restore
Width
Sync to RGB DC
Restore
DC Restore Width
Sync to Delay Line
Reset
Delay Line Reset
Width
Sync Input to Luma
Sync Output
Blanking End to
LUMA Start
Sync to Colorburst
Blanking End to
CRMA Start
DELAY LINE RESET
(USER INPUTS)
(USER INPUTS)
HSYNC/VSYNC
BURST FLAG/
MODULATOR
RIN/GIN BIN
RESTORE
CLAMPS
INPUT
CRMA
LUMA
Description
Input valid sync width for burst
insertion (user-controlled).
Minimum sync to color delay
(user-controlled).
Delay to modulator clamp start.
Length of modulator offset clamp
(no chroma during this period).
Delay to input clamping start.
Length of input clamp (no RGB
response during this period).
Delay to start of delay line
clock reset.
Length of delay line clock reset
(no luma response during this
period), also burst gate.
Delay from sync input assertion
to sync in LUMA output.
Delay from RGB input assertion
to LUMA output response.
Delay from valid horizontal sync
start to CRMA colorburst output.
Delay from RGB input assertion
to CRMA output response.
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Table I. Timing Description (See Figure 18)
t
SM
SS
Figure 18. Timing Diagram (Not to Scale)
SW
t
MW
t
t
SR
SD
t
SC
t
SB
t
t
DW
RW
–10–
Min
Max
Min
typ
typ
typ
typ
t
BC
NTSC
t
BY
1
2.8 s
5.3 s
8.2 s
392 ns
140 ns
5.4 s
2.5 s
5.7 s
2.5 s
310 ns
340 ns
5.8 s
360 ns
typ
typ
Min
Max
Min
typ
typ
PAL
2
REV. 0
3.3 s
5.4 s
8.1 s
298 ns
113 ns
5.6 s
2.3 s
5.8 s
2.3 s
265 ns
280 ns
5.9 s
300 ns