Z8623012PSG Zilog, Z8623012PSG Datasheet - Page 39

• Manufacturer Part Number: Z8623012PSG
• Description: IC SMART V-CHIP W/2ND I2C 18-DIP
• Manufacturer: Zilog
• Type: Video Decoderr

Specifications of Z8623012PSG

• Applications: Set-Top Boxes, TV
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: Z8623x
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Type: CMOS
• Maximum Clock Frequency: 12 MHz
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Lead Free Status / Rohs Status: Details

T
6.4 P
PS000401-TVC0699
Register Name
Serial Status
Register (SSR)
Configuration
XDS Data Activity
XDS Filter
Interrupt Request
Register
Interrupt Mask
Register
Content Advisory
Rating Select 1
Content Advisory
Rating Select 2
Content Advisory
Rating Select 3
Content Advisory
Rating Select 4
Content Advisory1
Content Advisory 2
Blocking Control 1
Content Advisory
Rating Select 5
Content Advisory
Rating Select 6
Blocking Control 2
N
ABLE
OTE
: All register bits marked as res must be set to Low(0).
30. S
ROGRAM
UMMARY OF
B
LOCKING
Addr
None
00h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
P
The following matrices demonstrate the program-blocking response of the
Z86230. The first column lists the possible entries into the Content Advisory Rat-
ing registers. The first row lists the ratings that might be recovered from the
received Content Advisory packet. Blocking action is indicated by the black
boxes.
Each matrix shows the response to the possible user selections entered into the
Content Advisory Rating registers when programs having specific Content Advi-
sory packets are received. For example, as shown in the TV Parental Guidelines
Rating matrix, entering the viewer selection from
blocking whenever the received Content Advisory packet is
TV-PG SD, TV-PG LD, TV-PG VSD, TV-PG VLD, TV-PG SLD or TV-PG VSLD
Z86230 I
ROGRAM
M
TV-MA
BLEN
AP
NTERNAL
B
RDY
res
res
res
res
res
res
res
res
res
res
D
LOCKING
s
V
B
P
2
7
Z86230—PRELIMINARY
TV-MA
NONE TV-MA
Rated
TV-14
R
M
DAV
Not
18+
res
res
res
res
res
res
D
EGISTERS
s
V
AP
L
1
1
1
6
18ans+ 16ans+ 13ans+
TV-PG
dXDS
dXDS
TV-14
(F)V
14+
res
res
res
res
D
s
X
V
D
L
0
5
WOVR
NC-17
TV-PG
TV-Y7
TV-14
PUBL
res
res
res
res
PG
res
FV
D
a1
S
L
4
TV-PG
MISC
dLOK
dLOK
INTR
BTE
res
res
res
res
res
D
a0
G
R
L
3
TV-PG D
TV-MA
CHAN
ROVR
PG-13
8ans+
TV-G
EOF
EOF
C8+
res
res
res
res
D
g2
r2
S
2
in register 09B causes
TV-PG D, TV-PG VD,
C
ONTROL
TV-Y7
TV-14
TV-14
FUTR
XDS
FLD
DLE
DLE
res
res
PG
D
g1
r1
D
G
S
C
1
R
EGISTERS
TV-PG
TV-PG
CURR
LOCK
TV-Y
DAV
BNR
TVS
res
res
D
g0
r0
G
D
S
E
E
0
.
39