MC68160AFB Freescale Semiconductor, MC68160AFB Datasheet - Page 26

• Manufacturer Part Number: MC68160AFB
• Description: IC ETHERNET TRANSRECEIVR 52-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC68160AFB

• Number Of Drivers/receivers: 1/1
• Protocol: AUI/TP
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 52-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

has begun, the EEST is still transmitting, the TPJABB pin will
assert to signify a jabber condition. Also, the CLLED pin will
transition high and low alternately with a 100 ms period. The
transmit circuitry is, however, unaffected by the jabber
condition, so the communications controller has the
responsibility of monitoring and stopping transmission.
begin the end of transmit and decay to idle responses
necessary to meet requirements of the 802.3 standard for the
TP and AUI port.
Data Reception
reception to the RX pin of the EEST is initiated by signaling at
the RX+/– or AUI ARX+/– pins. If at the TP port, the data is
screened for validity by checking for sequence and pulse
width requirements, then passed to the decode and receive
circuitry. The RENA pin asserts and the data and
corresponding clock is passed to the communications
controller. After the frame has been transmitted, the
MC68160A detects the ending transmission and negates
RENA. If at the AUI port, the data is checked for proper pulse
width requirements before being passed to the decode
circuitry. If the data pulses are longer than at least 20 ns,
RENA gets asserted and the frame is decoded to RX with
and accompanying RCLK output.
Collision
activity by two or more stations on the network. In the event of
collision, the data transfer paths are unaffected. If the
MC68160A is in the twisted pair mode, collision is detect by
simultaneous receive and transmit activity. If in the AUI
mode, collision is detected by activity on the ACX+/– pins. In
either case, if collision is detected, the CLSN pin will assert to
notify the communications controller.
Jabber
In the event that the transmitting station continues to transmit
beyond the allowable transmit time, a jabber timer (40 ms) will
26
If after approximately 40 ms after a TP or AUI transmission
When transmission is complete, the transmit circuitry will
Other than the case of being in Loop Back mode, data
Collision is the occurrence of simultaneous transmit
The EEST has a jabber timer to detect the jabber condition.
MC68160A
expire and assert the TPJABB pin to alert the communications
controller of the situation. The TPJABB pin can source or sink
up to 10 mA, and so, is capable of driving a status LED. In the
AUI mode, the pin is driven to high impedance since the
transceiver connected to the AUI port must alert the
communications controller of the jabber condition.
Full Duplex
mode. In this mode the EEST is capable of transmitting and
receiving simultaneously. Collision conditions are not
announced and internal loop back is disabled. The remainder
of the EEST functionality remains unchanged from the
non–Full Duplex mode. Full Duplex mode is enabled by
asserting the TPFULDL pin.
Auto Port Selection
automatically select the TP or AUI port depending on the
presence of valid link beats or frames at the TP RX+/– pins. If
the AUI port is automatically selected by another transmitting
station or by setting TPEN low, the TP transmit port of the
EEST continues to transmit link beats to keep the link active.
Auto Polarity Selection
MC68160A has the ability to automatically reverse the pins
internally so that the received data is valid. In addition, an open
collector status pin (TPPLR) is driven low to indicate the fault.
In the AUI or reset mode this pin presents a high impedance.
Loop Back Mode
the connected network, the EEST has a Loop Back mode.
Loop Back mode routes transmit data and clock to the
receive data and clock pins using as much of the transmit and
receive circuitry as possible. This gives a test of the
MC68160A Manchester encode and decode function. LOOP
must not be asserted when TPFULDL pin is asserted. This
causes the MC68160A to enter a test mode. This test mode
is used during final test and is not intended to be entered
under normal operation (see Application Notes section).
If the APORT pin is asserted, the MC68160A will
If the RX+ and the RX– wires happen to get reversed, the
To test the transmit and receive circuitry without disturbing
A feature unique to the MC68160A is the Full Duplex
MOTOROLA ANALOG IC DEVICE DATA